dt-bindings: pinctrl: uniphier: add UniPhier pinctrl binding
diff mbox

Message ID 1511855386-10421-1-git-send-email-yamada.masahiro@socionext.com
State New, archived
Headers show

Commit Message

Masahiro Yamada Nov. 28, 2017, 7:49 a.m. UTC
The driver has been in the tree for a while, but its binding document
is missing.  Hence, here it is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---

 .../pinctrl/socionext,uniphier-pinctrl.txt         | 27 ++++++++++++++++++++++
 MAINTAINERS                                        |  1 +
 2 files changed, 28 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt

Comments

Rob Herring Nov. 28, 2017, 3:27 p.m. UTC | #1
On Tue, Nov 28, 2017 at 04:49:45PM +0900, Masahiro Yamada wrote:
> The driver has been in the tree for a while, but its binding document
> is missing.  Hence, here it is.
> 
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
> ---
> 
>  .../pinctrl/socionext,uniphier-pinctrl.txt         | 27 ++++++++++++++++++++++
>  MAINTAINERS                                        |  1 +
>  2 files changed, 28 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
> new file mode 100644
> index 0000000..8173b12
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
> @@ -0,0 +1,27 @@
> +UniPhier SoCs pin controller
> +
> +Required properties:
> +- compatible: should be one of the following:
> +    "socionext,uniphier-ld4-pinctrl"  - for LD4 SoC
> +    "socionext,uniphier-pro4-pinctrl" - for Pro4 SoC
> +    "socionext,uniphier-sld8-pinctrl" - for sLD8 SoC
> +    "socionext,uniphier-pro5-pinctrl" - for Pro5 SoC
> +    "socionext,uniphier-pxs2-pinctrl" - for PXs2 SoC
> +    "socionext,uniphier-ld6b-pinctrl" - for LD6b SoC
> +    "socionext,uniphier-ld11-pinctrl" - for LD11 SoC
> +    "socionext,uniphier-ld20-pinctrl" - for LD20 SoC
> +    "socionext,uniphier-pxs3-pinctrl" - for PXs3 SoC
> +
> +Note:
> +The UniPhier pinctrl should be a subnode of a "syscon" compatible node.
> +
> +Example:
> +	soc-glue@5f800000 {
> +		compatible = "socionext,uniphier-pro4-soc-glue",
> +			     "simple-mfd", "syscon";
> +		reg = <0x5f800000 0x2000>;
> +
> +		pinctrl: pinctrl {
> +			compatible = "socionext,uniphier-pro4-pinctrl";

There's not a contiguous register range that can be put here?

> +		};
> +	};
> diff --git a/MAINTAINERS b/MAINTAINERS
> index aa71ab52f..38b0ddc 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -2042,6 +2042,7 @@ L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>  T:	git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
>  S:	Maintained
>  F:	Documentation/devicetree/bindings/gpio/gpio-uniphier.txt
> +F:	Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>  F:	arch/arm/boot/dts/uniphier*
>  F:	arch/arm/include/asm/hardware/cache-uniphier.h
>  F:	arch/arm/mach-uniphier/
> -- 
> 2.7.4
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Masahiro Yamada Nov. 29, 2017, 3:44 a.m. UTC | #2
Hi Rob,


2017-11-29 0:27 GMT+09:00 Rob Herring <robh@kernel.org>:
> On Tue, Nov 28, 2017 at 04:49:45PM +0900, Masahiro Yamada wrote:
>> The driver has been in the tree for a while, but its binding document
>> is missing.  Hence, here it is.
>>
>> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
>> ---
>>
>>  .../pinctrl/socionext,uniphier-pinctrl.txt         | 27 ++++++++++++++++++++++
>>  MAINTAINERS                                        |  1 +
>>  2 files changed, 28 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>> new file mode 100644
>> index 0000000..8173b12
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>> @@ -0,0 +1,27 @@
>> +UniPhier SoCs pin controller
>> +
>> +Required properties:
>> +- compatible: should be one of the following:
>> +    "socionext,uniphier-ld4-pinctrl"  - for LD4 SoC
>> +    "socionext,uniphier-pro4-pinctrl" - for Pro4 SoC
>> +    "socionext,uniphier-sld8-pinctrl" - for sLD8 SoC
>> +    "socionext,uniphier-pro5-pinctrl" - for Pro5 SoC
>> +    "socionext,uniphier-pxs2-pinctrl" - for PXs2 SoC
>> +    "socionext,uniphier-ld6b-pinctrl" - for LD6b SoC
>> +    "socionext,uniphier-ld11-pinctrl" - for LD11 SoC
>> +    "socionext,uniphier-ld20-pinctrl" - for LD20 SoC
>> +    "socionext,uniphier-pxs3-pinctrl" - for PXs3 SoC
>> +
>> +Note:
>> +The UniPhier pinctrl should be a subnode of a "syscon" compatible node.
>> +
>> +Example:
>> +     soc-glue@5f800000 {
>> +             compatible = "socionext,uniphier-pro4-soc-glue",
>> +                          "simple-mfd", "syscon";
>> +             reg = <0x5f800000 0x2000>;
>> +
>> +             pinctrl: pinctrl {
>> +                     compatible = "socionext,uniphier-pro4-pinctrl";
>
> There's not a contiguous register range that can be put here?


Right.

I saw SATA PHY registers are inserted among the pinctrl registers.

Hardware engineers often make crazy design.





>> +             };
>> +     };
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index aa71ab52f..38b0ddc 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2042,6 +2042,7 @@ L:      linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
>>  T:   git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
>>  S:   Maintained
>>  F:   Documentation/devicetree/bindings/gpio/gpio-uniphier.txt
>> +F:   Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>>  F:   arch/arm/boot/dts/uniphier*
>>  F:   arch/arm/include/asm/hardware/cache-uniphier.h
>>  F:   arch/arm/mach-uniphier/
>> --
>> 2.7.4
>>
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> --
> To unsubscribe from this list: send the line "unsubscribe linux-gpio" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
Rob Herring Nov. 30, 2017, 8:24 p.m. UTC | #3
On Tue, Nov 28, 2017 at 9:44 PM, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:
> Hi Rob,
>
>
> 2017-11-29 0:27 GMT+09:00 Rob Herring <robh@kernel.org>:
>> On Tue, Nov 28, 2017 at 04:49:45PM +0900, Masahiro Yamada wrote:
>>> The driver has been in the tree for a while, but its binding document
>>> is missing.  Hence, here it is.
>>>
>>> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
>>> ---
>>>
>>>  .../pinctrl/socionext,uniphier-pinctrl.txt         | 27 ++++++++++++++++++++++
>>>  MAINTAINERS                                        |  1 +
>>>  2 files changed, 28 insertions(+)
>>>  create mode 100644 Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>>> new file mode 100644
>>> index 0000000..8173b12
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
>>> @@ -0,0 +1,27 @@
>>> +UniPhier SoCs pin controller
>>> +
>>> +Required properties:
>>> +- compatible: should be one of the following:
>>> +    "socionext,uniphier-ld4-pinctrl"  - for LD4 SoC
>>> +    "socionext,uniphier-pro4-pinctrl" - for Pro4 SoC
>>> +    "socionext,uniphier-sld8-pinctrl" - for sLD8 SoC
>>> +    "socionext,uniphier-pro5-pinctrl" - for Pro5 SoC
>>> +    "socionext,uniphier-pxs2-pinctrl" - for PXs2 SoC
>>> +    "socionext,uniphier-ld6b-pinctrl" - for LD6b SoC
>>> +    "socionext,uniphier-ld11-pinctrl" - for LD11 SoC
>>> +    "socionext,uniphier-ld20-pinctrl" - for LD20 SoC
>>> +    "socionext,uniphier-pxs3-pinctrl" - for PXs3 SoC
>>> +
>>> +Note:
>>> +The UniPhier pinctrl should be a subnode of a "syscon" compatible node.
>>> +
>>> +Example:
>>> +     soc-glue@5f800000 {
>>> +             compatible = "socionext,uniphier-pro4-soc-glue",
>>> +                          "simple-mfd", "syscon";
>>> +             reg = <0x5f800000 0x2000>;
>>> +
>>> +             pinctrl: pinctrl {
>>> +                     compatible = "socionext,uniphier-pro4-pinctrl";
>>
>> There's not a contiguous register range that can be put here?
>
>
> Right.
>
> I saw SATA PHY registers are inserted among the pinctrl registers.

Okay,

Acked-by: Rob Herring <robh@kernel.org>

> Hardware engineers often make crazy design.

If there's 2 ways to do things, they will find a 3rd way.

Rob
Linus Walleij Dec. 2, 2017, 3:32 p.m. UTC | #4
On Tue, Nov 28, 2017 at 8:49 AM, Masahiro Yamada
<yamada.masahiro@socionext.com> wrote:

> The driver has been in the tree for a while, but its binding document
> is missing.  Hence, here it is.
>
> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Patch applied with Rob's ACK.

Yours,
Linus Walleij

Patch
diff mbox

diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
new file mode 100644
index 0000000..8173b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
@@ -0,0 +1,27 @@ 
+UniPhier SoCs pin controller
+
+Required properties:
+- compatible: should be one of the following:
+    "socionext,uniphier-ld4-pinctrl"  - for LD4 SoC
+    "socionext,uniphier-pro4-pinctrl" - for Pro4 SoC
+    "socionext,uniphier-sld8-pinctrl" - for sLD8 SoC
+    "socionext,uniphier-pro5-pinctrl" - for Pro5 SoC
+    "socionext,uniphier-pxs2-pinctrl" - for PXs2 SoC
+    "socionext,uniphier-ld6b-pinctrl" - for LD6b SoC
+    "socionext,uniphier-ld11-pinctrl" - for LD11 SoC
+    "socionext,uniphier-ld20-pinctrl" - for LD20 SoC
+    "socionext,uniphier-pxs3-pinctrl" - for PXs3 SoC
+
+Note:
+The UniPhier pinctrl should be a subnode of a "syscon" compatible node.
+
+Example:
+	soc-glue@5f800000 {
+		compatible = "socionext,uniphier-pro4-soc-glue",
+			     "simple-mfd", "syscon";
+		reg = <0x5f800000 0x2000>;
+
+		pinctrl: pinctrl {
+			compatible = "socionext,uniphier-pro4-pinctrl";
+		};
+	};
diff --git a/MAINTAINERS b/MAINTAINERS
index aa71ab52f..38b0ddc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2042,6 +2042,7 @@  L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
 S:	Maintained
 F:	Documentation/devicetree/bindings/gpio/gpio-uniphier.txt
+F:	Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
 F:	arch/arm/boot/dts/uniphier*
 F:	arch/arm/include/asm/hardware/cache-uniphier.h
 F:	arch/arm/mach-uniphier/