From patchwork Fri Dec 1 06:13:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10086311 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 58E0C6035E for ; Fri, 1 Dec 2017 06:14:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 459DC2A477 for ; Fri, 1 Dec 2017 06:14:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3AABE2A509; Fri, 1 Dec 2017 06:14:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEA092A477 for ; Fri, 1 Dec 2017 06:14:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750892AbdLAGN7 (ORCPT ); Fri, 1 Dec 2017 01:13:59 -0500 Received: from lelnx194.ext.ti.com ([198.47.27.80]:48443 "EHLO lelnx194.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752679AbdLAGN2 (ORCPT ); Fri, 1 Dec 2017 01:13:28 -0500 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id vB16Crgh015887; Fri, 1 Dec 2017 00:12:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1512108773; bh=wr1b0oi/w/zZImFcYANuwmLJf6SaXNDY8uNYW1dFsx0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=loJzJoIG06dgXGUURQKZO10fdxT4Vy2jEOG6JOnGLaP8ANOlYie+OdXWBjQsx9Gb0 CbA/tRfib6YAeqnEtMgzG0I8JUgxH/DlTVI54DzBy0lry/sJPmAzxVqHNCcC4n1U7V AqFtMW7zkOGk3xFekzmec/OnnQ9F8DMF+GRF2sjA= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16Crox030299; Fri, 1 Dec 2017 00:12:53 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 1 Dec 2017 00:12:53 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 1 Dec 2017 00:12:53 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id vB16CjTb013757; Fri, 1 Dec 2017 00:12:50 -0600 From: Vignesh R To: Bjorn Helgaas , Rob Herring , Tony Lindgren , Chris Welch CC: Kishon Vijay Abraham I , Lorenzo Pieralisi , , , , , , Vignesh R Subject: [PATCH 1/4] pci: dwc: pci-dra7xx: Enable errata i870 for both EP and RC mode Date: Fri, 1 Dec 2017 11:43:08 +0530 Message-ID: <20171201061311.16691-2-vigneshr@ti.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171201061311.16691-1-vigneshr@ti.com> References: <20171201061311.16691-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Errata i870 is applicable in both EP and RC mode. Therefore rename function dra7xx_pcie_ep_unaligned_memaccess(), that implements errata workaround, to dra7xx_pcie_unaligned_memaccess() and call it from a common place. So, that errata workaround is applied for both modes of operation. Reported-by: Chris Welch Signed-off-by: Vignesh R --- drivers/pci/dwc/pci-dra7xx.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index e77a4ceed74c..53f721d1cc40 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -546,7 +546,7 @@ static const struct of_device_id of_dra7xx_pcie_match[] = { }; /* - * dra7xx_pcie_ep_unaligned_memaccess: workaround for AM572x/AM571x Errata i870 + * dra7xx_pcie_unaligned_memaccess: workaround for AM572x/AM571x Errata i870 * @dra7xx: the dra7xx device where the workaround should be applied * * Access to the PCIe slave port that are not 32-bit aligned will result @@ -556,7 +556,7 @@ static const struct of_device_id of_dra7xx_pcie_match[] = { * * To avoid this issue set PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE to 1. */ -static int dra7xx_pcie_ep_unaligned_memaccess(struct device *dev) +static int dra7xx_pcie_unaligned_memaccess(struct device *dev) { int ret; struct device_node *np = dev->of_node; @@ -703,6 +703,10 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) if (dra7xx->link_gen < 0 || dra7xx->link_gen > 2) dra7xx->link_gen = 2; + ret = dra7xx_pcie_unaligned_memaccess(dev); + if (ret) + goto err_gpio; + switch (mode) { case DW_PCIE_RC_TYPE: dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE, @@ -715,10 +719,6 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev) dra7xx_pcie_writel(dra7xx, PCIECTRL_TI_CONF_DEVICE_TYPE, DEVICE_TYPE_EP); - ret = dra7xx_pcie_ep_unaligned_memaccess(dev); - if (ret) - goto err_gpio; - ret = dra7xx_add_pcie_ep(dra7xx, pdev); if (ret < 0) goto err_gpio;