Patchwork [i-g-t,3/4] lib/intel_aub: Add new MEM_TRACE commands

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Submitter Scott D Phillips
Date Dec. 6, 2017, 11:11 p.m.
Message ID <20171206231123.22380-3-scott.d.phillips@intel.com>
Download mbox | patch
Permalink /patch/10097391/
State New
Headers show

Comments

Scott D Phillips - Dec. 6, 2017, 11:11 p.m.
The memtrace aub commands are similar to the existing ones, but
different. Notably memtrace has commands for register write and
poll.

Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
---
 lib/intel_aub.h | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)
Jordan Justen - Dec. 17, 2017, 12:26 a.m.
Despite trying, I wasn't able to confirm these values. Nevertheless, I
was able to test your series, so:

Tested-by: Jordan Justen <jordan.l.justen@intel.com>

On 2017-12-06 15:11:22, Scott D Phillips wrote:
> The memtrace aub commands are similar to the existing ones, but
> different. Notably memtrace has commands for register write and
> poll.
> 
> Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
> ---
>  lib/intel_aub.h | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/lib/intel_aub.h b/lib/intel_aub.h
> index 5f0aba8e..9ca548ed 100644
> --- a/lib/intel_aub.h
> +++ b/lib/intel_aub.h
> @@ -49,6 +49,12 @@
>  #define CMD_AUB                        (7 << 29)
>  
>  #define CMD_AUB_HEADER         (CMD_AUB | (1 << 23) | (0x05 << 16))
> +
> +#define CMD_MEM_TRACE_REGISTER_POLL    (CMD_AUB | (0x2e << 23) | (0x02 << 16))
> +#define CMD_MEM_TRACE_REGISTER_WRITE   (CMD_AUB | (0x2e << 23) | (0x03 << 16))
> +#define CMD_MEM_TRACE_MEMORY_WRITE     (CMD_AUB | (0x2e << 23) | (0x06 << 16))
> +#define CMD_MEM_TRACE_VERSION          (CMD_AUB | (0x2e << 23) | (0x0e << 16))
> +
>  /* DW1 */
>  # define AUB_HEADER_MAJOR_SHIFT                24
>  # define AUB_HEADER_MINOR_SHIFT                16
> @@ -92,8 +98,28 @@
>  #define AUB_TRACE_MEMTYPE_PCI          (3 << 16)
>  #define AUB_TRACE_MEMTYPE_GTT_ENTRY     (4 << 16)
>  
> +#define AUB_MEM_TRACE_VERSION_FILE_VERSION     1
> +
>  /* DW2 */
>  
> +#define AUB_MEM_TRACE_VERSION_DEVICE_MASK      0x0000ff00
> +#define AUB_MEM_TRACE_VERSION_DEVICE_CNL       (15 << 8)
> +
> +#define AUB_MEM_TRACE_VERSION_METHOD_MASK      0x000c0000
> +#define AUB_MEM_TRACE_VERSION_METHOD_PHY       (1 << 18)
> +
> +#define AUB_MEM_TRACE_REGISTER_SIZE_MASK       0x000f0000
> +#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD      (2 << 16)
> +
> +#define AUB_MEM_TRACE_REGISTER_SPACE_MASK      0xf0000000
> +#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO      (0 << 28)
> +
> +/* DW3 */
> +
> +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK                0xf0000000
> +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL       (1 << 28)
> +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY  (4 << 28)
> +
>  /**
>   * aub_state_struct_type enum values are encoded with the top 16 bits
>   * representing the type to be delivered to the .aub file, and the bottom 16
> -- 
> 2.14.3
>

Patch

diff --git a/lib/intel_aub.h b/lib/intel_aub.h
index 5f0aba8e..9ca548ed 100644
--- a/lib/intel_aub.h
+++ b/lib/intel_aub.h
@@ -49,6 +49,12 @@ 
 #define CMD_AUB			(7 << 29)
 
 #define CMD_AUB_HEADER		(CMD_AUB | (1 << 23) | (0x05 << 16))
+
+#define CMD_MEM_TRACE_REGISTER_POLL	(CMD_AUB | (0x2e << 23) | (0x02 << 16))
+#define CMD_MEM_TRACE_REGISTER_WRITE	(CMD_AUB | (0x2e << 23) | (0x03 << 16))
+#define CMD_MEM_TRACE_MEMORY_WRITE	(CMD_AUB | (0x2e << 23) | (0x06 << 16))
+#define CMD_MEM_TRACE_VERSION		(CMD_AUB | (0x2e << 23) | (0x0e << 16))
+
 /* DW1 */
 # define AUB_HEADER_MAJOR_SHIFT		24
 # define AUB_HEADER_MINOR_SHIFT		16
@@ -92,8 +98,28 @@ 
 #define AUB_TRACE_MEMTYPE_PCI		(3 << 16)
 #define AUB_TRACE_MEMTYPE_GTT_ENTRY     (4 << 16)
 
+#define AUB_MEM_TRACE_VERSION_FILE_VERSION	1
+
 /* DW2 */
 
+#define AUB_MEM_TRACE_VERSION_DEVICE_MASK	0x0000ff00
+#define AUB_MEM_TRACE_VERSION_DEVICE_CNL	(15 << 8)
+
+#define AUB_MEM_TRACE_VERSION_METHOD_MASK	0x000c0000
+#define AUB_MEM_TRACE_VERSION_METHOD_PHY	(1 << 18)
+
+#define AUB_MEM_TRACE_REGISTER_SIZE_MASK	0x000f0000
+#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD	(2 << 16)
+
+#define AUB_MEM_TRACE_REGISTER_SPACE_MASK	0xf0000000
+#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO	(0 << 28)
+
+/* DW3 */
+
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK		0xf0000000
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL	(1 << 28)
+#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY	(4 << 28)
+
 /**
  * aub_state_struct_type enum values are encoded with the top 16 bits
  * representing the type to be delivered to the .aub file, and the bottom 16