From patchwork Fri Dec 29 11:41:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 10137025 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 94C6A603FA for ; Fri, 29 Dec 2017 11:54:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 821952DEE8 for ; Fri, 29 Dec 2017 11:54:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 767432DF30; Fri, 29 Dec 2017 11:54:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C9F4F2DF0D for ; Fri, 29 Dec 2017 11:54:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755472AbdL2Lxy (ORCPT ); Fri, 29 Dec 2017 06:53:54 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:54590 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754723AbdL2Lxu (ORCPT ); Fri, 29 Dec 2017 06:53:50 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id vBTBrk04013522; Fri, 29 Dec 2017 05:53:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1514548426; bh=HsPC3Yq4yRhABSvSWbZrl32Acpx2ndL44sUMqbwWDt8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=k6SBMw9TJA/TpNK0Q9qzFxGHnWKaQd/ztsTSKuExz0wC+XKeNNUm/EcclF2gSKFNM 9e/sef84aRhI3f3sdMZwVAK2S4ujeewYcmRc+tVITELfVG7M+uBEuOqv2Yvg+sl542 gofZpHbLxED3NQoe5E02RtPUhzdZg4OcKb/cbz/g= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBTBrk6Y012732; Fri, 29 Dec 2017 05:53:46 -0600 Received: from DLEE101.ent.ti.com (157.170.170.31) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Fri, 29 Dec 2017 05:53:46 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Fri, 29 Dec 2017 05:53:46 -0600 Received: from a0132425.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id vBTBrcak024499; Fri, 29 Dec 2017 05:53:44 -0600 From: Vignesh R To: Lorenzo Pieralisi CC: Kishon Vijay Abraham I , Bjorn Helgaas , , , , Vignesh R Subject: [PATCH v2 2/2] PCI: dra7xx: Iterate over INTx status bits Date: Fri, 29 Dec 2017 17:11:31 +0530 Message-ID: <20171229114131.22296-3-vigneshr@ti.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171229114131.22296-1-vigneshr@ti.com> References: <20171229114131.22296-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is possible that more than one legacy IRQ may be set at the same time, therefore iterate and handle all the pending INTx interrupts before clearing the status and exiting the IRQ handler. Otherwise, some interrupts would be lost. Signed-off-by: Vignesh R Acked-by: Kishon Vijay Abraham I --- drivers/pci/dwc/pci-dra7xx.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/pci/dwc/pci-dra7xx.c b/drivers/pci/dwc/pci-dra7xx.c index 892f93910012..48c6ae535847 100644 --- a/drivers/pci/dwc/pci-dra7xx.c +++ b/drivers/pci/dwc/pci-dra7xx.c @@ -257,7 +257,8 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) struct dra7xx_pcie *dra7xx = arg; struct dw_pcie *pci = dra7xx->pci; struct pcie_port *pp = &pci->pp; - u32 reg; + unsigned long reg; + u32 virq, bit; reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_IRQSTATUS_MSI); @@ -269,8 +270,11 @@ static irqreturn_t dra7xx_pcie_msi_irq_handler(int irq, void *arg) case INTB: case INTC: case INTD: - generic_handle_irq(irq_find_mapping(dra7xx->irq_domain, - ffs(reg) - 1)); + for_each_set_bit(bit, ®, PCI_NUM_INTX) { + virq = irq_find_mapping(dra7xx->irq_domain, bit); + if (virq) + generic_handle_irq(virq); + } break; }