[06/18] dmaengine/amba-pl08x: Simplify pl08x_ensure_on()
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Message ID 88035b0bd1f3fd755b6a157193c39477e21ec60a.1311936524.git.viresh.kumar@st.com
State New, archived
Headers show

Commit Message

Viresh KUMAR July 29, 2011, 10:49 a.m. UTC
Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
Also as per manual, for bit 3-31 of DMACConfiguration register:
"read undefined, write as 0"

So, we must not rely on values read from this registers bit 3-31.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
---
 drivers/dma/amba-pl08x.c |    8 +-------
 1 files changed, 1 insertions(+), 7 deletions(-)

Comments

Linus Walleij July 30, 2011, 10:36 p.m. UTC | #1
2011/7/29 Viresh Kumar <viresh.kumar@st.com>:

> Simply writing 1 on bit 0 is sufficient instead of reading and clearing bits.
> Also as per manual, for bit 3-31 of DMACConfiguration register:
> "read undefined, write as 0"
>
> So, we must not rely on values read from this registers bit 3-31.
>
> Signed-off-by: Viresh Kumar <viresh.kumar@st.com>

Obviously correct,
Acked-by: Linus Walleij <linus.walleij@linaro.org>

Thanks,
Linus Walleij

Patch
diff mbox

diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 56a9670..53d722e 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -1505,13 +1505,7 @@  bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
  */
 static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
 {
-	u32 val;
-
-	val = readl(pl08x->base + PL080_CONFIG);
-	val &= ~(PL080_CONFIG_M2_BE | PL080_CONFIG_M1_BE | PL080_CONFIG_ENABLE);
-	/* We implicitly clear bit 1 and that means little-endian mode */
-	val |= PL080_CONFIG_ENABLE;
-	writel(val, pl08x->base + PL080_CONFIG);
+	writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
 }
 
 static void pl08x_unmap_buffers(struct pl08x_txd *txd)