| Message ID | 20180216043322.22874-5-dhinakaran.pandiyan@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting Dhinakaran Pandiyan (2018-02-16 04:33:22) > With fbdev, screen freezes after a few continuous PSR exit->enter cycles. > Printing out the PSR status register clearly showed this freeze coincided > with exiting when the hardware is in a transitory state. So wait for a max > of 100 ms (~6 frames) for PSR to become active and then exit. > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > --- > drivers/gpu/drm/i915/intel_psr.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 2a31c7cbdb41..d6669f5f890f 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -738,6 +738,17 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv) > WARN_ON(!(val & EDP_PSR2_ENABLE)); > I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE); > } else { > + /* Wait for about 6 frames in case we just enabled PSR, > + * this prevents the screen from freezing as the HW does > + * not seem to be able to back off cleanly it is already > + * trying to enter PSR. > + */ > + intel_wait_for_register(dev_priv, > + EDP_PSR_STATUS, > + EDP_PSR_STATUS_STATE_MASK, > + EDP_PSR_STATUS_STATE_SRDENT, > + 100); I'm going to suggest that you want a DRM_DEBUG_KMS() (_DRIVER? Not sure what works best for PSR/frontbuffer-tracking) at least for spotting trouble when it times out. I would start with a DRM_ERROR for a few CI passes just to see what's happening on our machines before toning it down for production. -Chris
On Fri, 2018-02-16 at 08:58 +0000, Chris Wilson wrote: > Quoting Dhinakaran Pandiyan (2018-02-16 04:33:22) > > With fbdev, screen freezes after a few continuous PSR exit->enter cycles. > > Printing out the PSR status register clearly showed this freeze coincided > > with exiting when the hardware is in a transitory state. So wait for a max > > of 100 ms (~6 frames) for PSR to become active and then exit. > > > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> > > --- > > drivers/gpu/drm/i915/intel_psr.c | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > > index 2a31c7cbdb41..d6669f5f890f 100644 > > --- a/drivers/gpu/drm/i915/intel_psr.c > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > @@ -738,6 +738,17 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv) > > WARN_ON(!(val & EDP_PSR2_ENABLE)); > > I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE); > > } else { > > + /* Wait for about 6 frames in case we just enabled PSR, > > + * this prevents the screen from freezing as the HW does > > + * not seem to be able to back off cleanly it is already > > + * trying to enter PSR. > > + */ > > + intel_wait_for_register(dev_priv, > > + EDP_PSR_STATUS, > > + EDP_PSR_STATUS_STATE_MASK, > > + EDP_PSR_STATUS_STATE_SRDENT, > > + 100); > > I'm going to suggest that you want a DRM_DEBUG_KMS() (_DRIVER? Not sure > what works best for PSR/frontbuffer-tracking) at least for spotting > trouble when it times out. I would start with a DRM_ERROR for a few CI > passes just to see what's happening on our machines before toning it > down for production. Thanks for the suggestion, makes sense. I don't think we have a test to emulate a blinking fbcon cursor, which happens to trigger continuous PSR flushes. I'll look into it. -DK > -Chris > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 2a31c7cbdb41..d6669f5f890f 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -738,6 +738,17 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv) WARN_ON(!(val & EDP_PSR2_ENABLE)); I915_WRITE(EDP_PSR2_CTL, val & ~EDP_PSR2_ENABLE); } else { + /* Wait for about 6 frames in case we just enabled PSR, + * this prevents the screen from freezing as the HW does + * not seem to be able to back off cleanly it is already + * trying to enter PSR. + */ + intel_wait_for_register(dev_priv, + EDP_PSR_STATUS, + EDP_PSR_STATUS_STATE_MASK, + EDP_PSR_STATUS_STATE_SRDENT, + 100); + val = I915_READ(EDP_PSR_CTL); WARN_ON(!(val & EDP_PSR_ENABLE)); I915_WRITE(EDP_PSR_CTL, val & ~EDP_PSR_ENABLE);
With fbdev, screen freezes after a few continuous PSR exit->enter cycles. Printing out the PSR status register clearly showed this freeze coincided with exiting when the hardware is in a transitory state. So wait for a max of 100 ms (~6 frames) for PSR to become active and then exit. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> --- drivers/gpu/drm/i915/intel_psr.c | 11 +++++++++++ 1 file changed, 11 insertions(+)