diff mbox

[1/3] drm/i915: Share PSR and PSR2 VSC setup

Message ID 20180221021826.12006-1-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Souza, Jose Feb. 21, 2018, 2:18 a.m. UTC
Just share the common code in PSR and PSR2.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_psr.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

Comments

Dhinakaran Pandiyan Feb. 24, 2018, 1:52 a.m. UTC | #1
On Tue, 2018-02-20 at 18:18 -0800, José Roberto de Souza wrote:
> Just share the common code in PSR and PSR2.

> 

> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

> ---

>  drivers/gpu/drm/i915/intel_psr.c | 10 ++++------

>  1 file changed, 4 insertions(+), 6 deletions(-)

> 

> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c

> index 2ef374f936b9..71801a25a2b3 100644

> --- a/drivers/gpu/drm/i915/intel_psr.c

> +++ b/drivers/gpu/drm/i915/intel_psr.c

> @@ -88,11 +88,12 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,

>  	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);

>  	struct edp_vsc_psr psr_vsc;

>  

> +	memset(&psr_vsc, 0, sizeof(psr_vsc));

> +	psr_vsc.sdp_header.HB0 = 0;

> +	psr_vsc.sdp_header.HB1 = 0x7;

> +

>  


I don't think this is very useful, the original version is easier to
read IMO.


> 	if (dev_priv->psr.psr2_support) {

>  		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */

> -		memset(&psr_vsc, 0, sizeof(psr_vsc));

> -		psr_vsc.sdp_header.HB0 = 0;

> -		psr_vsc.sdp_header.HB1 = 0x7;

>  		if (dev_priv->psr.colorimetry_support &&

>  		    dev_priv->psr.y_cord_support) {

>  			psr_vsc.sdp_header.HB2 = 0x5;

> @@ -106,9 +107,6 @@ static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,

>  		}

>  	} else {

>  		/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */

> -		memset(&psr_vsc, 0, sizeof(psr_vsc));

> -		psr_vsc.sdp_header.HB0 = 0;

> -		psr_vsc.sdp_header.HB1 = 0x7;

>  		psr_vsc.sdp_header.HB2 = 0x2;

>  		psr_vsc.sdp_header.HB3 = 0x8;

>  	}
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2ef374f936b9..71801a25a2b3 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -88,11 +88,12 @@  static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
 	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 	struct edp_vsc_psr psr_vsc;
 
+	memset(&psr_vsc, 0, sizeof(psr_vsc));
+	psr_vsc.sdp_header.HB0 = 0;
+	psr_vsc.sdp_header.HB1 = 0x7;
+
 	if (dev_priv->psr.psr2_support) {
 		/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
-		memset(&psr_vsc, 0, sizeof(psr_vsc));
-		psr_vsc.sdp_header.HB0 = 0;
-		psr_vsc.sdp_header.HB1 = 0x7;
 		if (dev_priv->psr.colorimetry_support &&
 		    dev_priv->psr.y_cord_support) {
 			psr_vsc.sdp_header.HB2 = 0x5;
@@ -106,9 +107,6 @@  static void hsw_psr_setup_vsc(struct intel_dp *intel_dp,
 		}
 	} else {
 		/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
-		memset(&psr_vsc, 0, sizeof(psr_vsc));
-		psr_vsc.sdp_header.HB0 = 0;
-		psr_vsc.sdp_header.HB1 = 0x7;
 		psr_vsc.sdp_header.HB2 = 0x2;
 		psr_vsc.sdp_header.HB3 = 0x8;
 	}