| Message ID | e1130d4e-7c70-fe3d-1a09-349e95ad1b33@cogentembedded.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | cef26946f247c75a3b1c7919ea801d2ea8511f00 |
| Delegated to: | Simon Horman |
| Headers | show |
On Fri, Mar 9, 2018 at 1:06 PM, Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> wrote: > Define the generic R8A77980 part of the PFC device node. > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi > +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > @@ -71,6 +71,11 @@ > #size-cells = <2>; > ranges; > > + pfc: pin-controller@e6060000 { > + compatible = "renesas,pfc-r8a77980"; > + reg = <0 0xe6060000 0 0x50c>; 0x50c is an odd number, given the last register is at offset 0x500, just like on V3M ;-) > + }; > + With the above fixed: Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -71,6 +71,11 @@ #size-cells = <2>; ranges; + pfc: pin-controller@e6060000 { + compatible = "renesas,pfc-r8a77980"; + reg = <0 0xe6060000 0 0x50c>; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a77980-cpg-mssr"; reg = <0 0xe6150000 0 0x1000>;
Define the generic R8A77980 part of the PFC device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- arch/arm64/boot/dts/renesas/r8a77980.dtsi | 5 +++++ 1 file changed, 5 insertions(+)