@@ -73,6 +73,24 @@ static bool xgene_8250_erratum_present(struct acpi_table_spcr *tb)
return xgene_8250;
}
+/*
+ * AMD Carrizo / Stoneyridge use a DesignWare 8250 UART that uses a special
+ * earlycon setup handler to configure its input clock in order to compute
+ * baud rate divisor registers.
+ * Detect them by examining the OEM fields in the SPCR header.
+ */
+static bool amdcz_present(struct acpi_table_spcr *tb)
+{
+ if (memcmp(tb->header.oem_id, "AMDCZ ", ACPI_OEM_ID_SIZE))
+ return false;
+
+ if (memcmp(tb->header.oem_table_id, "AMDCZ ",
+ ACPI_OEM_TABLE_ID_SIZE))
+ return false;
+
+ return true;
+}
+
/**
* acpi_parse_spcr() - parse ACPI SPCR table and add preferred console
*
@@ -189,6 +207,11 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
uart = "qdf2400_e44";
}
+ if (amdcz_present(table)) {
+ if (enable_earlycon)
+ uart = "amdcz";
+ }
+
if (xgene_8250_erratum_present(table)) {
iotype = "mmio32";