Message ID | 20180315133502.4992-1-david.weinehall@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Thu, Mar 15, 2018 at 03:35:02PM +0200, David Weinehall wrote: > Since Coffee Lake uses the Kaby Lake DMC it's a safe > bet that the debug registers are the same. I haven't > double-checked that the GLK DMC uses the same registers > as BXT, but it seems as good of a guess as any. It would be good to check. Last time that I checked we were getting deep PC residencies but these registers were zeroed on CFL. Also this bit confuses many people since it is not a proper residency counter :/ > > Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index c4cc8fef11a0..dad0776d58b4 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused) > seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), > CSR_VERSION_MINOR(csr->version)); > > - if (IS_KABYLAKE(dev_priv) || > + if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || > (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { > seq_printf(m, "DC3 -> DC5 count: %d\n", > I915_READ(SKL_CSR_DC3_DC5_COUNT)); > seq_printf(m, "DC5 -> DC6 count: %d\n", > I915_READ(SKL_CSR_DC5_DC6_COUNT)); > - } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { > + } else if (IS_GEMINILAKE(dev_priv) || > + IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { > seq_printf(m, "DC3 -> DC5 count: %d\n", > I915_READ(BXT_CSR_DC3_DC5_COUNT)); > } > -- > 2.16.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Hi David, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on v4.16-rc4] [also build test WARNING on next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/David-Weinehall/drm-i915-Show-dmc-debug-registers-on-CFL-and-GLK/20180318-082134 config: x86_64-randconfig-x002-201811 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All warnings (new ones prefixed by >>): drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_dmc_info': >> drivers/gpu/drm/i915/i915_debugfs.c:2785:34: warning: suggest parentheses around '&&' within '||' [-Wparentheses] IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { vim +2785 drivers/gpu/drm/i915/i915_debugfs.c 2756 2757 static int i915_dmc_info(struct seq_file *m, void *unused) 2758 { 2759 struct drm_i915_private *dev_priv = node_to_i915(m->private); 2760 struct intel_csr *csr; 2761 2762 if (!HAS_CSR(dev_priv)) 2763 return -ENODEV; 2764 2765 csr = &dev_priv->csr; 2766 2767 intel_runtime_pm_get(dev_priv); 2768 2769 seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL)); 2770 seq_printf(m, "path: %s\n", csr->fw_path); 2771 2772 if (!csr->dmc_payload) 2773 goto out; 2774 2775 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), 2776 CSR_VERSION_MINOR(csr->version)); 2777 2778 if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || 2779 (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { 2780 seq_printf(m, "DC3 -> DC5 count: %d\n", 2781 I915_READ(SKL_CSR_DC3_DC5_COUNT)); 2782 seq_printf(m, "DC5 -> DC6 count: %d\n", 2783 I915_READ(SKL_CSR_DC5_DC6_COUNT)); 2784 } else if (IS_GEMINILAKE(dev_priv) || > 2785 IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { 2786 seq_printf(m, "DC3 -> DC5 count: %d\n", 2787 I915_READ(BXT_CSR_DC3_DC5_COUNT)); 2788 } 2789 2790 out: 2791 seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); 2792 seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); 2793 seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); 2794 2795 intel_runtime_pm_put(dev_priv); 2796 2797 return 0; 2798 } 2799 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi David, Thank you for the patch! Yet something to improve: [auto build test ERROR on v4.16-rc4] [also build test ERROR on next-20180316] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/David-Weinehall/drm-i915-Show-dmc-debug-registers-on-CFL-and-GLK/20180318-082134 config: i386-randconfig-x075-201811 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): drivers/gpu/drm/i915/i915_debugfs.c: In function 'i915_dmc_info': >> drivers/gpu/drm/i915/i915_debugfs.c:2785:34: error: suggest parentheses around '&&' within '||' [-Werror=parentheses] IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { cc1: all warnings being treated as errors vim +2785 drivers/gpu/drm/i915/i915_debugfs.c 2756 2757 static int i915_dmc_info(struct seq_file *m, void *unused) 2758 { 2759 struct drm_i915_private *dev_priv = node_to_i915(m->private); 2760 struct intel_csr *csr; 2761 2762 if (!HAS_CSR(dev_priv)) 2763 return -ENODEV; 2764 2765 csr = &dev_priv->csr; 2766 2767 intel_runtime_pm_get(dev_priv); 2768 2769 seq_printf(m, "fw loaded: %s\n", yesno(csr->dmc_payload != NULL)); 2770 seq_printf(m, "path: %s\n", csr->fw_path); 2771 2772 if (!csr->dmc_payload) 2773 goto out; 2774 2775 seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), 2776 CSR_VERSION_MINOR(csr->version)); 2777 2778 if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || 2779 (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { 2780 seq_printf(m, "DC3 -> DC5 count: %d\n", 2781 I915_READ(SKL_CSR_DC3_DC5_COUNT)); 2782 seq_printf(m, "DC5 -> DC6 count: %d\n", 2783 I915_READ(SKL_CSR_DC5_DC6_COUNT)); 2784 } else if (IS_GEMINILAKE(dev_priv) || > 2785 IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { 2786 seq_printf(m, "DC3 -> DC5 count: %d\n", 2787 I915_READ(BXT_CSR_DC3_DC5_COUNT)); 2788 } 2789 2790 out: 2791 seq_printf(m, "program base: 0x%08x\n", I915_READ(CSR_PROGRAM(0))); 2792 seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); 2793 seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); 2794 2795 intel_runtime_pm_put(dev_priv); 2796 2797 return 0; 2798 } 2799 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
On Thu, Mar 15, 2018 at 05:42:00PM -0700, Rodrigo Vivi wrote: > On Thu, Mar 15, 2018 at 03:35:02PM +0200, David Weinehall wrote: > > Since Coffee Lake uses the Kaby Lake DMC it's a safe > > bet that the debug registers are the same. I haven't > > double-checked that the GLK DMC uses the same registers > > as BXT, but it seems as good of a guess as any. > > It would be good to check. Last time that I checked we were getting > deep PC residencies but these registers were zeroed on CFL. > > Also this bit confuses many people since it is not a > proper residency counter :/ I'll run some tests on all platforms that are supposed to be supported by this, and compare the behaviour. > > > > > Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> > > --- > > drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- > > 1 file changed, 3 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > > index c4cc8fef11a0..dad0776d58b4 100644 > > --- a/drivers/gpu/drm/i915/i915_debugfs.c > > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > > @@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused) > > seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), > > CSR_VERSION_MINOR(csr->version)); > > > > - if (IS_KABYLAKE(dev_priv) || > > + if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || > > (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { > > seq_printf(m, "DC3 -> DC5 count: %d\n", > > I915_READ(SKL_CSR_DC3_DC5_COUNT)); > > seq_printf(m, "DC5 -> DC6 count: %d\n", > > I915_READ(SKL_CSR_DC5_DC6_COUNT)); > > - } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { > > + } else if (IS_GEMINILAKE(dev_priv) || > > + IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { > > seq_printf(m, "DC3 -> DC5 count: %d\n", > > I915_READ(BXT_CSR_DC3_DC5_COUNT)); > > } > > -- > > 2.16.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index c4cc8fef11a0..dad0776d58b4 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2813,13 +2813,14 @@ static int i915_dmc_info(struct seq_file *m, void *unused) seq_printf(m, "version: %d.%d\n", CSR_VERSION_MAJOR(csr->version), CSR_VERSION_MINOR(csr->version)); - if (IS_KABYLAKE(dev_priv) || + if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv) || (IS_SKYLAKE(dev_priv) && csr->version >= CSR_VERSION(1, 6))) { seq_printf(m, "DC3 -> DC5 count: %d\n", I915_READ(SKL_CSR_DC3_DC5_COUNT)); seq_printf(m, "DC5 -> DC6 count: %d\n", I915_READ(SKL_CSR_DC5_DC6_COUNT)); - } else if (IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { + } else if (IS_GEMINILAKE(dev_priv) || + IS_BROXTON(dev_priv) && csr->version >= CSR_VERSION(1, 4)) { seq_printf(m, "DC3 -> DC5 count: %d\n", I915_READ(BXT_CSR_DC3_DC5_COUNT)); }
Since Coffee Lake uses the Kaby Lake DMC it's a safe bet that the debug registers are the same. I haven't double-checked that the GLK DMC uses the same registers as BXT, but it seems as good of a guess as any. Signed-off-by: David Weinehall <david.weinehall@linux.intel.com> --- drivers/gpu/drm/i915/i915_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)