From patchwork Wed Mar 28 07:39:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 10312465 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D68BE60467 for ; Wed, 28 Mar 2018 07:40:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C747628A0F for ; Wed, 28 Mar 2018 07:40:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B97A72940F; Wed, 28 Mar 2018 07:40:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 38A9528A0F for ; Wed, 28 Mar 2018 07:40:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753489AbeC1Hj6 (ORCPT ); Wed, 28 Mar 2018 03:39:58 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:55932 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752853AbeC1Hj4 (ORCPT ); Wed, 28 Mar 2018 03:39:56 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E4DD87705E; Wed, 28 Mar 2018 07:39:55 +0000 (UTC) Received: from thh440s.str.redhat.com (dhcp-192-189.str.redhat.com [10.33.192.189]) by smtp.corp.redhat.com (Postfix) with ESMTP id 121DE10B2B38; Wed, 28 Mar 2018 07:39:54 +0000 (UTC) From: Thomas Huth To: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Cc: kvm@vger.kernel.org, David Hildenbrand , Janosch Frank Subject: [kvm-unit-tests PULL 7/8] s390x: Add vector tests Date: Wed, 28 Mar 2018 09:39:43 +0200 Message-Id: <1522222784-7709-8-git-send-email-thuth@redhat.com> In-Reply-To: <1522222784-7709-1-git-send-email-thuth@redhat.com> References: <1522222784-7709-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Wed, 28 Mar 2018 07:39:55 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.1]); Wed, 28 Mar 2018 07:39:55 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'thuth@redhat.com' RCPT:'' Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Janosch Frank Short test of the vector, vector enhancement 1 and vector bcd facility. Signed-off-by: Janosch Frank [thuth: Use memset(&prm, 0xff, sizeof(prm)) in test_ext1_nand()] Signed-off-by: Thomas Huth --- lib/s390x/asm/arch_def.h | 18 +++++++ s390x/Makefile | 1 + s390x/unittests.cfg | 3 ++ s390x/vector.c | 133 +++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 155 insertions(+) create mode 100644 s390x/vector.c diff --git a/lib/s390x/asm/arch_def.h b/lib/s390x/asm/arch_def.h index b67afac..99abe18 100644 --- a/lib/s390x/asm/arch_def.h +++ b/lib/s390x/asm/arch_def.h @@ -183,6 +183,24 @@ static inline uint64_t stctg(int cr) return value; } +static inline void ctl_set_bit(int cr, unsigned int bit) +{ + uint64_t reg; + + reg = stctg(cr); + reg |= 1UL << bit; + lctlg(cr, reg); +} + +static inline void ctl_clear_bit(int cr, unsigned int bit) +{ + uint64_t reg; + + reg = stctg(cr); + reg &= ~(1UL << bit); + lctlg(cr, reg); +} + static inline uint64_t extract_psw_mask(void) { uint32_t mask_upper = 0, mask_lower = 0; diff --git a/s390x/Makefile b/s390x/Makefile index d80ca96..7188daa 100644 --- a/s390x/Makefile +++ b/s390x/Makefile @@ -7,6 +7,7 @@ tests += $(TEST_DIR)/skey.elf tests += $(TEST_DIR)/diag10.elf tests += $(TEST_DIR)/pfmf.elf tests += $(TEST_DIR)/cmm.elf +tests += $(TEST_DIR)/vector.elf all: directories test_cases diff --git a/s390x/unittests.cfg b/s390x/unittests.cfg index 63135d5..3943861 100644 --- a/s390x/unittests.cfg +++ b/s390x/unittests.cfg @@ -49,3 +49,6 @@ file = pfmf.elf [cmm] file = cmm.elf + +[vector] +file = vector.elf diff --git a/s390x/vector.c b/s390x/vector.c new file mode 100644 index 0000000..05b3eca --- /dev/null +++ b/s390x/vector.c @@ -0,0 +1,133 @@ +/* + * Tests vector instruction support + * + * Copyright 2018 IBM Corp. + * + * Authors: + * Janosch Frank + * + * This code is free software; you can redistribute it and/or modify it + * under the terms of the GNU Library General Public License version 2. + */ +#include +#include +#include +#include +#include + +static uint8_t pagebuf[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE))); + +/* Fills all vector registers with data from addr */ +static inline void vlm_all(unsigned long *addr) +{ + asm volatile(" .machine z13\n" + " vlm 0, 15, %[a]\n" + : : [a] "Q" (*addr) + : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", + "v9", "v10", "v11", "v12", "v13", "v14", "v15"); + asm volatile(" .machine z13\n" + " vlm 16, 31, %[a]\n" + : : [a] "Q" (*(addr+256/8)) + : "v16", "v17", "v18", "v19", "v20", "v21", "v22", + "v23", "v24", "v25", "v26", "v27", "v28", "v29", + "v30", "v31"); +} + +static void test_add(void) +{ + static struct prm { + __uint128_t a,b,c; + } prm __attribute__((aligned(16))); + + prm.a = prm.b = prm.c = 21; + + asm volatile(" .machine z13\n" + " vl 0, %[v1]\n" + " vl 1, %[v2]\n" + " va 2, 0, 1, 4\n" + " vst 2, %[v3]\n" + : [v3] "=Q" (prm.c) + : [v1] "Q" (prm.a), [v2] "Q" (prm.b) + : "v0", "v1", "v2", "memory"); + report("adding 21", prm.c == 42); +} + +/* z14 vector extension test */ +static void test_ext1_nand(void) +{ + bool has_vext = test_facility(134); + static struct prm { + __uint128_t a,b,c; + } prm __attribute__((aligned(16))); + + report_xfail("Vector extensions 1 available", !has_vext, has_vext); + if (!has_vext) + return; + + memset(&prm, 0xff, sizeof(prm)); + + asm volatile(" .machine z13\n" + " vl 0, %[v1]\n" + " vl 1, %[v2]\n" + " .byte 0xe7, 0x20, 0x10, 0x00, 0x00, 0x6e\n" /* vnn */ + " vst 2, %[v3]\n" + : [v3] "=Q" (prm.c) + : [v1] "Q" (prm.a), [v2] "Q" (prm.b) + : "v0", "v1", "v2", "memory"); + report("nand ff", !prm.c); +} + +/* z14 bcd extension test */ +static void test_bcd_add(void) +{ + bool has_bcd = test_facility(135); + static struct prm { + __uint128_t a,b,c; + } prm __attribute__((aligned(16))); + + report_xfail("Vector BCD extensions available", !has_bcd, has_bcd); + if (!has_bcd) + return; + + prm.c = 0; + prm.a = prm.b = 0b001000011100; + + asm volatile(" .machine z13\n" + " vl 0, %[v1]\n" + " vl 1, %[v2]\n" + " .byte 0xe6, 0x20, 0x10, 0x01, 0x00, 0x71\n" /* vap */ + " vst 2, %[v3]\n" + : [v3] "=Q" (prm.c) + : [v1] "Q" (prm.a), [v2] "Q" (prm.b) + : "v0", "v1", "v2", "memory"); + report("bcd add 21", prm.c == 0x42c); +} + +static void init(void) +{ + /* Enable vector instructions */ + ctl_set_bit(0, 17); + + /* Preset vector registers to 0xff */ + memset(pagebuf, 0xff, PAGE_SIZE); + vlm_all((u64*)pagebuf); +} + +int main(void) +{ + bool has_vregs = test_facility(129); + + report_prefix_push("vector"); + report_xfail("Basic vector facility available", !has_vregs, has_vregs); + if (!has_vregs) + goto done; + + init(); + test_add(); + test_ext1_nand(); + test_bcd_add(); + +done: + report_prefix_pop(); + return report_summary(); +}