| Message ID | 1522752747-7836-3-git-send-email-kevin.rogovin@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Quoting kevin.rogovin@intel.com (2018-04-03 13:52:24) > From: Kevin Rogovin <kevin.rogovin@intel.com> > > Now that "DOC: User command execution" of i915_gem_execbuffer.c is included > in the i915.rst, it is benecifial (for new developers) to read what happens > at the bottom of the driver stack (in terms of bytes written to be read > by the GPU) when processing a user-space batchbuffer. > > Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com> > --- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index 8c170db8495d..1fe5da1fed47 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -81,6 +81,28 @@ enum { > * but this remains just a hint as the kernel may choose a new location for > * any object in the future. > * > + * At the level of talking to the hardware, submitting a batchbuffer for the > + * GPU to execute is to add content to a buffer from which the HW > + * command streamer is reading. > + * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. > + * Execlists, this command is not placed on the same buffer as the > + * remaining items. > + * 2. Add a command to invalidate caches to the buffer. > + * 3. Add a batchbuffer start command to the buffer; the start command is > + * essentially a token together with the GPU address of the batchbuffer > + * to be executed. > + * 4. Add a pipeline flush to the buffer. > + * 5. Add a memory write command to the buffer to record when the GPU > + * is done executing the batchbuffer. The memory write writes the > + * global sequence number of the request, `i915_request::global_seqno``; Double tick here. With that fixed: Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Regards, Joonas > + * the i915 driver uses the current value in the register to determine > + * if the GPU has completed the batchbuffer. > + * 6. Add a user interrupt command to the buffer. This command instructs > + * the GPU to issue an interrupt when the command, pipeline flush and > + * memory write are completed. > + * 7. Inform the hardware of the additional commands added to the buffer > + * (by updating the tail pointer). > + * > * Processing an execbuf ioctl is conceptually split up into a few phases. > * > * 1. Validation - Ensure all the pointers, handles and flags are valid. > -- > 2.16.2 >
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 8c170db8495d..1fe5da1fed47 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -81,6 +81,28 @@ enum { * but this remains just a hint as the kernel may choose a new location for * any object in the future. * + * At the level of talking to the hardware, submitting a batchbuffer for the + * GPU to execute is to add content to a buffer from which the HW + * command streamer is reading. + * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. + * Execlists, this command is not placed on the same buffer as the + * remaining items. + * 2. Add a command to invalidate caches to the buffer. + * 3. Add a batchbuffer start command to the buffer; the start command is + * essentially a token together with the GPU address of the batchbuffer + * to be executed. + * 4. Add a pipeline flush to the buffer. + * 5. Add a memory write command to the buffer to record when the GPU + * is done executing the batchbuffer. The memory write writes the + * global sequence number of the request, `i915_request::global_seqno``; + * the i915 driver uses the current value in the register to determine + * if the GPU has completed the batchbuffer. + * 6. Add a user interrupt command to the buffer. This command instructs + * the GPU to issue an interrupt when the command, pipeline flush and + * memory write are completed. + * 7. Inform the hardware of the additional commands added to the buffer + * (by updating the tail pointer). + * * Processing an execbuf ioctl is conceptually split up into a few phases. * * 1. Validation - Ensure all the pointers, handles and flags are valid.