From patchwork Thu Apr 19 07:42:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vathsala nagaraju X-Patchwork-Id: 10349243 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C35CF6023A for ; Thu, 19 Apr 2018 07:43:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B64082899E for ; Thu, 19 Apr 2018 07:43:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AAEE1289A2; Thu, 19 Apr 2018 07:43:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id EB8E1289A3 for ; Thu, 19 Apr 2018 07:43:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CA766E5EB; Thu, 19 Apr 2018 07:43:22 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 066C96E5E9 for ; Thu, 19 Apr 2018 07:43:20 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Apr 2018 00:43:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.48,468,1517904000"; d="scan'208";a="38648058" Received: from vnagaraj-hp-elitedesk-800-g1-twr.iind.intel.com ([10.66.247.146]) by fmsmga002.fm.intel.com with ESMTP; 19 Apr 2018 00:43:18 -0700 From: vathsala nagaraju To: rodrigo.vivi@intel.com, jani.nikula@linux.intel.com, intel-gfx@lists.freedesktop.org Date: Thu, 19 Apr 2018 13:12:39 +0530 Message-Id: <1524123759-3778-1-git-send-email-vathsala.nagaraju@intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915/psr: vbt change for psr X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Puthikorn Voravootivat , Maulik V Vaghela MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP From: Vathsala Nagaraju For psr block #9, the vbt description has moved to options [0-3] for TP1,TP2,TP3 Wakeup time from decimal value without any change to vbt structure. Since spec does not mention from which VBT version this change was added to vbt.bsf file, we cannot depend on bdb->version check to change for all the platforms. There is RCR inplace for GOP team to provide the version number to make generic change. Since Kabylake with bdb version 209 is having this change, limiting this change to kbl and version 209+ to unblock google. Tested on skl(bdb version 203,without options) and kabylake(bdb version 209,212) having new options. bspec 20131 v2: (Jani and Rodrigo) move the 165 version check to intel_bios.c v3: Jani move the abstraction to intel_bios Cc: Rodrigo Vivi CC: Puthikorn Voravootivat Signed-off-by: Maulik V Vaghela Signed-off-by: Vathsala Nagaraju --- drivers/gpu/drm/i915/intel_bios.c | 40 ++++++++++++++++++++++++++++++++++++--- drivers/gpu/drm/i915/intel_psr.c | 26 ++++++++++++------------- 2 files changed, 50 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 702d3fa..8913dc8 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -646,6 +646,15 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, } } +static bool +is_psr_options(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) +{ + if (bdb->version >= 209 && IS_KABYLAKE(dev_priv)) + return true; + else + return false; +} + static void parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) { @@ -658,7 +667,6 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, DRM_DEBUG_KMS("No PSR BDB found.\n"); return; } - psr_table = &psr->psr_table[panel_type]; dev_priv->vbt.psr.full_link = psr_table->full_link; @@ -687,8 +695,34 @@ static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, break; } - dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; - dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; + /* new psr options old decimal value interpretation + * 0 [500 us] > 1 [500 us ] + * 1 [100 us] > 0 [100 us ] + * 2 [2.5 ms] > 5 [2.5 ms ] + * 3 [0 us] = 0 [0 us ] + */ + if (!is_psr_options(dev_priv, bdb)) { + if (psr_table->tp1_wakeup_time > 5) + dev_priv->vbt.psr.tp1_wakeup_time = 2; + else if (psr_table->tp1_wakeup_time > 1) + dev_priv->vbt.psr.tp1_wakeup_time = 0; + else if (psr_table->tp1_wakeup_time > 0) + dev_priv->vbt.psr.tp1_wakeup_time = 1; + else + dev_priv->vbt.psr.tp1_wakeup_time = 3; + + if (psr_table->tp2_tp3_wakeup_time > 5) + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 2; + else if (psr_table->tp2_tp3_wakeup_time > 1) + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 0; + else if (psr_table->tp1_wakeup_time > 0) + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 1; + else + dev_priv->vbt.psr.tp2_tp3_wakeup_time = 3; + } else { + dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; + dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; + } } static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv, diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 69a5b27..95658ad 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -353,21 +353,21 @@ static void hsw_activate_psr1(struct intel_dp *intel_dp) if (dev_priv->psr.link_standby) val |= EDP_PSR_LINK_STANDBY; - if (dev_priv->vbt.psr.tp1_wakeup_time > 5) - val |= EDP_PSR_TP1_TIME_2500us; - else if (dev_priv->vbt.psr.tp1_wakeup_time > 1) + if (dev_priv->vbt.psr.tp1_wakeup_time == 0) val |= EDP_PSR_TP1_TIME_500us; - else if (dev_priv->vbt.psr.tp1_wakeup_time > 0) + else if (dev_priv->vbt.psr.tp1_wakeup_time == 1) val |= EDP_PSR_TP1_TIME_100us; + else if (dev_priv->vbt.psr.tp1_wakeup_time == 2) + val |= EDP_PSR_TP1_TIME_2500us; else val |= EDP_PSR_TP1_TIME_0us; - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5) - val |= EDP_PSR_TP2_TP3_TIME_2500us; - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1) - val |= EDP_PSR_TP2_TP3_TIME_500us; - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0) + if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0) + val |= EDP_PSR_TP2_TP3_TIME_500us; + else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1) val |= EDP_PSR_TP2_TP3_TIME_100us; + else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2) + val |= EDP_PSR_TP2_TP3_TIME_2500us; else val |= EDP_PSR_TP2_TP3_TIME_0us; @@ -406,12 +406,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp) val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1); - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5) - val |= EDP_PSR2_TP2_TIME_2500; - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 1) + if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 0) val |= EDP_PSR2_TP2_TIME_500; - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 0) + else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 1) val |= EDP_PSR2_TP2_TIME_100; + else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time == 2) + val |= EDP_PSR2_TP2_TIME_2500; else val |= EDP_PSR2_TP2_TIME_50;