| Message ID | 20180423082447.1516-1-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 23 April 2018 at 18:24, Thierry Reding <thierry.reding@gmail.com> wrote: > From: Thierry Reding <treding@nvidia.com> > > Depending on the kernel configuration, early ARM architecture setup code > may have attached the GPU to a DMA/IOMMU mapping that transparently uses > the IOMMU to back the DMA API. Tegra requires special handling for IOMMU > backed buffers (a special bit in the GPU's MMU page tables indicates the > memory path to take: via the SMMU or directly to the memory controller). > Transparently backing DMA memory with an IOMMU prevents Nouveau from > properly handling such memory accesses and causes memory access faults. > > As a side-note: buffers other than those allocated in instance memory > don't need to be physically contiguous from the GPU's perspective since > the GPU can map them into contiguous buffers using its own MMU. Mapping > these buffers through the IOMMU is unnecessary and will even lead to > performance degradation because of the additional translation. This is not strictly true. If you want to be able to use compression etc, on Tegra GPUs, you'll need to be able to map multiple (potentially smaller, ie. 4K) system memory pages into a contiguous block big enough to satisfy the GPU big page size. Noone's implemented this for Tegra in Nouveau yet, but the rest of the support should be there already now. Ben. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > .../drm/nouveau/nvkm/engine/device/tegra.c | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c > index 1f07999aea1d..ac7706f56f6f 100644 > --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c > +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c > @@ -19,6 +19,11 @@ > * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER > * DEALINGS IN THE SOFTWARE. > */ > + > +#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) > +#include <asm/dma-iommu.h> > +#endif > + > #include <core/tegra.h> > #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER > #include "priv.h" > @@ -105,6 +110,20 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev) > unsigned long pgsize_bitmap; > int ret; > > +#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) > + if (dev->archdata.mapping) { > + struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); > + > + arm_iommu_release_mapping(mapping); > + arm_iommu_detach_device(dev); > + > + if (dev->archdata.dma_coherent) > + set_dma_ops(dev, &arm_coherent_dma_ops); > + else > + set_dma_ops(dev, &arm_dma_ops); > + } > +#endif > + > if (!tdev->func->iommu_bit) > return; > > -- > 2.17.0 > > _______________________________________________ > Nouveau mailing list > Nouveau@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/nouveau
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 1f07999aea1d..ac7706f56f6f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -19,6 +19,11 @@ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ + +#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) +#include <asm/dma-iommu.h> +#endif + #include <core/tegra.h> #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER #include "priv.h" @@ -105,6 +110,20 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev) unsigned long pgsize_bitmap; int ret; +#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU) + if (dev->archdata.mapping) { + struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev); + + arm_iommu_release_mapping(mapping); + arm_iommu_detach_device(dev); + + if (dev->archdata.dma_coherent) + set_dma_ops(dev, &arm_coherent_dma_ops); + else + set_dma_ops(dev, &arm_dma_ops); + } +#endif + if (!tdev->func->iommu_bit) return;