[v2,3/3] ARM: dts: stm32: Add ADC support to stm32mp157c
diff mbox

Message ID 1525247091-18143-4-git-send-email-fabrice.gasnier@st.com
State New
Headers show

Commit Message

Fabrice Gasnier May 2, 2018, 7:44 a.m. UTC
stm32mp157c has an ADC block with two physical ADCs.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Jonathan Cameron May 7, 2018, 5:23 p.m. UTC | #1
On Wed, 2 May 2018 09:44:51 +0200
Fabrice Gasnier <fabrice.gasnier@st.com> wrote:

> stm32mp157c has an ADC block with two physical ADCs.
> 
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
The driver support is now queued up in the IIO tree and should
be in Linux next later this week.

Thanks,

Jonathan

> ---
>  arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
> index bc3eddc..7758a90 100644
> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
> @@ -160,6 +160,38 @@
>  			status = "disabled";
>  		};
>  
> +		adc: adc@48003000 {
> +			compatible = "st,stm32mp1-adc-core";
> +			reg = <0x48003000 0x400>;
> +			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&rcc ADC12>, <&rcc ADC12_K>;
> +			clock-names = "bus", "adc";
> +			interrupt-controller;
> +			#interrupt-cells = <1>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +
> +			adc1: adc@0 {
> +				compatible = "st,stm32mp1-adc";
> +				#io-channel-cells = <1>;
> +				reg = <0x0>;
> +				interrupt-parent = <&adc>;
> +				interrupts = <0>;
> +				status = "disabled";
> +			};
> +
> +			adc2: adc@100 {
> +				compatible = "st,stm32mp1-adc";
> +				#io-channel-cells = <1>;
> +				reg = <0x100>;
> +				interrupt-parent = <&adc>;
> +				interrupts = <1>;
> +				status = "disabled";
> +			};
> +		};
> +
>  		rcc: rcc@50000000 {
>  			compatible = "st,stm32mp1-rcc", "syscon";
>  			reg = <0x50000000 0x1000>;

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Fabrice Gasnier May 22, 2018, 3:51 p.m. UTC | #2
On 05/07/2018 07:23 PM, Jonathan Cameron wrote:
> On Wed, 2 May 2018 09:44:51 +0200
> Fabrice Gasnier <fabrice.gasnier@st.com> wrote:
> 
>> stm32mp157c has an ADC block with two physical ADCs.
>>
>> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
> The driver support is now queued up in the IIO tree and should
> be in Linux next later this week.

Hi,

Many Thanks Jonathan :-)

Alex, I just sent an updated version (v3) of this patch (with additional
dmas).

Best Regards,
Fabrice

> 
> Thanks,
> 
> Jonathan
> 
>> ---
>>  arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++
>>  1 file changed, 32 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
>> index bc3eddc..7758a90 100644
>> --- a/arch/arm/boot/dts/stm32mp157c.dtsi
>> +++ b/arch/arm/boot/dts/stm32mp157c.dtsi
>> @@ -160,6 +160,38 @@
>>  			status = "disabled";
>>  		};
>>  
>> +		adc: adc@48003000 {
>> +			compatible = "st,stm32mp1-adc-core";
>> +			reg = <0x48003000 0x400>;
>> +			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
>> +				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&rcc ADC12>, <&rcc ADC12_K>;
>> +			clock-names = "bus", "adc";
>> +			interrupt-controller;
>> +			#interrupt-cells = <1>;
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +			status = "disabled";
>> +
>> +			adc1: adc@0 {
>> +				compatible = "st,stm32mp1-adc";
>> +				#io-channel-cells = <1>;
>> +				reg = <0x0>;
>> +				interrupt-parent = <&adc>;
>> +				interrupts = <0>;
>> +				status = "disabled";
>> +			};
>> +
>> +			adc2: adc@100 {
>> +				compatible = "st,stm32mp1-adc";
>> +				#io-channel-cells = <1>;
>> +				reg = <0x100>;
>> +				interrupt-parent = <&adc>;
>> +				interrupts = <1>;
>> +				status = "disabled";
>> +			};
>> +		};
>> +
>>  		rcc: rcc@50000000 {
>>  			compatible = "st,stm32mp1-rcc", "syscon";
>>  			reg = <0x50000000 0x1000>;
> 
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Patch
diff mbox

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi
index bc3eddc..7758a90 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -160,6 +160,38 @@ 
 			status = "disabled";
 		};
 
+		adc: adc@48003000 {
+			compatible = "st,stm32mp1-adc-core";
+			reg = <0x48003000 0x400>;
+			interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&rcc ADC12>, <&rcc ADC12_K>;
+			clock-names = "bus", "adc";
+			interrupt-controller;
+			#interrupt-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			adc1: adc@0 {
+				compatible = "st,stm32mp1-adc";
+				#io-channel-cells = <1>;
+				reg = <0x0>;
+				interrupt-parent = <&adc>;
+				interrupts = <0>;
+				status = "disabled";
+			};
+
+			adc2: adc@100 {
+				compatible = "st,stm32mp1-adc";
+				#io-channel-cells = <1>;
+				reg = <0x100>;
+				interrupt-parent = <&adc>;
+				interrupts = <1>;
+				status = "disabled";
+			};
+		};
+
 		rcc: rcc@50000000 {
 			compatible = "st,stm32mp1-rcc", "syscon";
 			reg = <0x50000000 0x1000>;