From patchwork Mon May 14 11:42:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 10398073 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 05E2F601E7 for ; Mon, 14 May 2018 11:45:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E59D229114 for ; Mon, 14 May 2018 11:45:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D8CC929116; Mon, 14 May 2018 11:45:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3F0CF29114 for ; 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Mon, 14 May 2018 11:43:46 +0000 (GMT) Received: from epcas1p2.samsung.com ( [182.195.41.46]) by epsmges1p3.samsung.com (Symantec Messaging Gateway) with SMTP id 14.83.04144.27679FA5; Mon, 14 May 2018 20:43:46 +0900 (KST) Received: from epsmgms2p1new.samsung.com (unknown [182.195.42.142]) by epcas1p4.samsung.com (KnoxPortal) with ESMTP id 20180514114346epcas1p4a59f6760861791ae53eac48975c9172a~ugCaFzmIO1504415044epcas1p4n; Mon, 14 May 2018 11:43:46 +0000 (GMT) X-AuditID: b6c32a37-511ff70000001030-eb-5af9767277d8 Received: from epmmp1.local.host ( [203.254.227.16]) by epsmgms2p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 82.FB.03822.27679FA5; Mon, 14 May 2018 20:43:46 +0900 (KST) Received: from AMDC3058.DIGITAL.local ([106.120.53.102]) by mmp1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P8P00KHHV793330@mmp1.samsung.com>; Mon, 14 May 2018 20:43:46 +0900 (KST) From: Bartlomiej Zolnierkiewicz To: Eduardo Valentin , Keerthy Cc: Zhang Rui , linux-pm@vger.kernel.org, linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, b.zolnierkie@samsung.com Subject: [PATCH 11/14] thermal: ti-soc-thermal: use OMAP5 register tables for DRA752 Date: Mon, 14 May 2018 13:42:18 +0200 Message-id: <1526298141-14045-12-git-send-email-b.zolnierkie@samsung.com> X-Mailer: git-send-email 1.9.1 In-reply-to: <1526298141-14045-1-git-send-email-b.zolnierkie@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrEIsWRmVeSWpSXmKPExsWy7bCmnm5R2c8og/83jCw2zljPajH/yjVW i1Pbm5gsLu+aw2Yxe0k/i8Xn3iOMFk8e9rE5sHvsnHWX3WPxnpdMHn1bVjF6HL+xncnj8ya5 ANYoLpuU1JzMstQifbsEroyH2w6wF3Q4VWzecYClgXG3ZRcjJ4eEgInE0gdXmLoYuTiEBHYw SnR+/c8K4XxnlNjZ28wOUzWxfQcjRGI3o8SUvWugqn4xSiy7eYIRpIpNwAqoahWYLSLgJjFr yR8wm1lgKqPEpgn1ILawQJjE5gm7gOIcHCwCqhLzN0WBhHkFPCXuvtnACLFMTuLkscmsIDYn UHxD+0s2kF0SAj1sEusWrwPrlRBwkfiyLhqiXlji1fEt7BBhaYlLR20hypsZJb7t2MMMUTOB UWLPeiEI21ri8PGLrBCn8Um8+9rDCtHLK9HRBlXiIXFlywwWCNtRYvaeWewQ785hlHjycgHL BEapBYwMqxjFUguKc9NTiw0LjPWKE3OLS/PS9ZLzczcxgmNSy3wH44ZzPocYBTgYlXh4A5b/ iBJiTSwrrsw9xCjBwawkwrvb6GeUEG9KYmVValF+fFFpTmrxIUZpDhYlcd45Sl+jhATSE0tS s1NTC1KLYLJMHJxSDYyzj2SvPbqv6S53Yod2nNaGzQk/kgzmzjA/cGdnw5cnJYn83jzHUwJk NBLiloQySd9bKBDu/e5yUgoPX0fQlMXmfRHP7N+180YE/S7NOeS5dbrsrNgLLiIWJcaXK5P4 TMrLOptXvovMq4icOXk2b9J7yZ+FlzaYnq0ufcPFH9o/K1fXR7fKWomlOCPRUIu5qDgRAEPg nAfFAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuphluLIzCtJLcpLzFFi42I5/e+xgG5R2c8og9+PFC02zljPajH/yjVW i1Pbm5gsLu+aw2Yxe0k/i8Xn3iOMFk8e9rE5sHvsnHWX3WPxnpdMHn1bVjF6HL+xncnj8ya5 ANYoLpuU1JzMstQifbsEroyH2w6wF3Q4VWzecYClgXG3ZRcjJ4eEgInExPYdjF2MXBxCAjsZ Jc5uhnF+MUpsa7/ABlLFJmAFVLWKEcQWEXCTmLXkD1gRs8BURonJn06BFQkLhEmsbzvK3sXI wcEioCoxf1MUSJhXwFPi7psNjBDb5CROHpvMCmJzAsU3tL8EaxUS8JC4/buFbQIjzwJGhlWM kqkFxbnpucVGBYZ5qeV6xYm5xaV56XrJ+bmbGIFhtO2wVt8OxvtL4g8xCnAwKvHwrlj5I0qI NbGsuDL3EKMEB7OSCO9uo59RQrwpiZVVqUX58UWlOanFhxilOViUxHlv5x2LFBJITyxJzU5N LUgtgskycXBKNTC2hAuJusx/u/toBD9nS29S57bv94/G+r2cH9FnvHNRcM7ew2fN31/n/P29 tlWD8eDr6/EXis5/KY33lPixJ8H8wNeYsJAlKtd2Blm99N4amb6erdZYafGii7ZL1zKYvBbX fG7nx+wxZceBDl2ZBqeXHadU77FH6dg+sOWyzb3zkzdZrEx96wolluKMREMt5qLiRAA0Uwd2 HwIAAA== X-CMS-MailID: 20180514114346epcas1p4a59f6760861791ae53eac48975c9172a X-Msg-Generator: CA CMS-TYPE: 101P X-CMS-RootMailID: 20180514114346epcas1p4a59f6760861791ae53eac48975c9172a X-RootMTR: 20180514114346epcas1p4a59f6760861791ae53eac48975c9172a References: <1526298141-14045-1-git-send-email-b.zolnierkie@samsung.com> Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OMAP5 register tables for MPU, GPU & CORE sensors are almost identical to these for DRA752 (OMAP5 ones also set value for .tshut_threshold but it is used only when TSHUT_CONFIG feature is enabled and DRA752 doesn't enable it) so just use them also for DRA752 instead of duplicating them. There should be no functional changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz --- drivers/thermal/ti-soc-thermal/Makefile | 2 +- drivers/thermal/ti-soc-thermal/dra752-bandgap.h | 4 ++ .../thermal/ti-soc-thermal/dra752-thermal-data.c | 75 +--------------------- .../thermal/ti-soc-thermal/omap5-thermal-data.c | 8 ++- 4 files changed, 13 insertions(+), 76 deletions(-) diff --git a/drivers/thermal/ti-soc-thermal/Makefile b/drivers/thermal/ti-soc-thermal/Makefile index f180ebe..aa1c38d 100644 --- a/drivers/thermal/ti-soc-thermal/Makefile +++ b/drivers/thermal/ti-soc-thermal/Makefile @@ -2,7 +2,7 @@ obj-$(CONFIG_TI_SOC_THERMAL) += ti-soc-thermal.o ti-soc-thermal-y := ti-bandgap.o ti-soc-thermal-$(CONFIG_TI_THERMAL) += ti-thermal-common.o -ti-soc-thermal-$(CONFIG_DRA752_THERMAL) += dra752-thermal-data.o +ti-soc-thermal-$(CONFIG_DRA752_THERMAL) += dra752-thermal-data.o omap5-thermal-data.o ti-soc-thermal-$(CONFIG_OMAP3_THERMAL) += omap3-thermal-data.o ti-soc-thermal-$(CONFIG_OMAP4_THERMAL) += omap4-thermal-data.o ti-soc-thermal-$(CONFIG_OMAP5_THERMAL) += omap5-thermal-data.o diff --git a/drivers/thermal/ti-soc-thermal/dra752-bandgap.h b/drivers/thermal/ti-soc-thermal/dra752-bandgap.h index b9d65b4..c39af38 100644 --- a/drivers/thermal/ti-soc-thermal/dra752-bandgap.h +++ b/drivers/thermal/ti-soc-thermal/dra752-bandgap.h @@ -84,4 +84,8 @@ #define DRA752_BANDGAP_STATUS_2_HOT_DSPEVE_MASK BIT(1) #define DRA752_BANDGAP_STATUS_2_COLD_DSPEVE_MASK BIT(0) +extern struct temp_sensor_registers omap5430_mpu_temp_sensor_registers; +extern struct temp_sensor_registers omap5430_gpu_temp_sensor_registers; +extern struct temp_sensor_registers omap5430_core_temp_sensor_registers; + #endif /* __DRA752_BANDGAP_H */ diff --git a/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c b/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c index de412a2..dcc0b10 100644 --- a/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c +++ b/drivers/thermal/ti-soc-thermal/dra752-thermal-data.c @@ -31,29 +31,6 @@ */ /* - * DRA752 CORE thermal sensor register offsets and bit-fields - */ -static struct temp_sensor_registers -dra752_core_temp_sensor_registers = { - .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET, - .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, - .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, - .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, - .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, - .mask_hot_mask = OMAP5430_MASK_HOT_CORE_MASK, - .mask_cold_mask = OMAP5430_MASK_COLD_CORE_MASK, - .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, - .mask_freeze_mask = OMAP5430_MASK_FREEZE_CORE_MASK, - .bgap_threshold = OMAP5430_BGAP_THRESHOLD_CORE_OFFSET, - .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, - .status_hot_mask = OMAP5430_HOT_CORE_FLAG_MASK, - .status_cold_mask = OMAP5430_COLD_CORE_FLAG_MASK, - .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_CORE_1_OFFSET, - .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_CORE_2_OFFSET, - .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE, -}; - -/* * DRA752 IVA thermal sensor register offsets and bit-fields */ static struct temp_sensor_registers @@ -77,29 +54,6 @@ }; /* - * DRA752 MPU thermal sensor register offsets and bit-fields - */ -static struct temp_sensor_registers -dra752_mpu_temp_sensor_registers = { - .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET, - .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, - .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, - .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, - .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, - .mask_hot_mask = OMAP5430_MASK_HOT_MPU_MASK, - .mask_cold_mask = OMAP5430_MASK_COLD_MPU_MASK, - .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, - .mask_freeze_mask = OMAP5430_MASK_FREEZE_MPU_MASK, - .bgap_threshold = OMAP5430_BGAP_THRESHOLD_MPU_OFFSET, - .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, - .status_hot_mask = OMAP5430_HOT_MPU_FLAG_MASK, - .status_cold_mask = OMAP5430_COLD_MPU_FLAG_MASK, - .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_MPU_1_OFFSET, - .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_MPU_2_OFFSET, - .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_MPU, -}; - -/* * DRA752 DSPEVE thermal sensor register offsets and bit-fields */ static struct temp_sensor_registers @@ -122,29 +76,6 @@ .bgap_efuse = DRA752_STD_FUSE_OPP_BGAP_DSPEVE_OFFSET, }; -/* - * DRA752 GPU thermal sensor register offsets and bit-fields - */ -static struct temp_sensor_registers -dra752_gpu_temp_sensor_registers = { - .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET, - .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, - .bgap_eocz_mask = OMAP5430_BGAP_TEMP_SENSOR_EOCZ_MASK, - .bgap_dtemp_mask = OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK, - .bgap_mask_ctrl = OMAP5430_BGAP_CTRL_OFFSET, - .mask_hot_mask = OMAP5430_MASK_HOT_GPU_MASK, - .mask_cold_mask = OMAP5430_MASK_COLD_GPU_MASK, - .mask_counter_delay_mask = OMAP5430_MASK_COUNTER_DELAY_MASK, - .mask_freeze_mask = OMAP5430_MASK_FREEZE_GPU_MASK, - .bgap_threshold = OMAP5430_BGAP_THRESHOLD_GPU_OFFSET, - .bgap_status = OMAP5430_BGAP_STATUS_OFFSET, - .status_hot_mask = OMAP5430_HOT_GPU_FLAG_MASK, - .status_cold_mask = OMAP5430_COLD_GPU_FLAG_MASK, - .ctrl_dtemp_1 = OMAP5430_BGAP_DTEMP_GPU_1_OFFSET, - .ctrl_dtemp_2 = OMAP5430_BGAP_DTEMP_GPU_2_OFFSET, - .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_GPU, -}; - /* Thresholds and limits for DRA752 temperature sensor */ static struct temp_sensor_data dra752_temp_sensor_data = { .t_hot = OMAP5430_T_HOT, @@ -297,7 +228,7 @@ .adc_end_val = OMAP5430_ADC_END_VALUE, .sensors = { { - .registers = &dra752_mpu_temp_sensor_registers, + .registers = &omap5430_mpu_temp_sensor_registers, .ts_data = &dra752_temp_sensor_data, .domain = "cpu", .register_cooling = ti_thermal_register_cpu_cooling, @@ -306,14 +237,14 @@ .constant_pcb = DRA752_GRADIENT_CONST_W_PCB, }, { - .registers = &dra752_gpu_temp_sensor_registers, + .registers = &omap5430_gpu_temp_sensor_registers, .ts_data = &dra752_temp_sensor_data, .domain = "gpu", .slope_pcb = DRA752_GRADIENT_SLOPE_W_PCB, .constant_pcb = DRA752_GRADIENT_CONST_W_PCB, }, { - .registers = &dra752_core_temp_sensor_registers, + .registers = &omap5430_core_temp_sensor_registers, .ts_data = &dra752_temp_sensor_data, .domain = "core", .slope_pcb = DRA752_GRADIENT_SLOPE_W_PCB, diff --git a/drivers/thermal/ti-soc-thermal/omap5-thermal-data.c b/drivers/thermal/ti-soc-thermal/omap5-thermal-data.c index defa714..fce6e30 100644 --- a/drivers/thermal/ti-soc-thermal/omap5-thermal-data.c +++ b/drivers/thermal/ti-soc-thermal/omap5-thermal-data.c @@ -28,7 +28,7 @@ /* * OMAP5430 MPU thermal sensor register offset and bit-fields */ -static struct temp_sensor_registers +struct temp_sensor_registers omap5430_mpu_temp_sensor_registers = { .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_MPU_OFFSET, .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, @@ -57,7 +57,7 @@ /* * OMAP5430 GPU thermal sensor register offset and bit-fields */ -static struct temp_sensor_registers +struct temp_sensor_registers omap5430_gpu_temp_sensor_registers = { .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_GPU_OFFSET, .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, @@ -87,7 +87,7 @@ /* * OMAP5430 CORE thermal sensor register offset and bit-fields */ -static struct temp_sensor_registers +struct temp_sensor_registers omap5430_core_temp_sensor_registers = { .temp_sensor_ctrl = OMAP5430_TEMP_SENSOR_CORE_OFFSET, .bgap_tempsoff_mask = OMAP5430_BGAP_TEMPSOFF_MASK, @@ -114,6 +114,7 @@ .bgap_efuse = OMAP5430_FUSE_OPP_BGAP_CORE, }; +#ifdef CONFIG_OMAP5_THERMAL /* Thresholds and limits for OMAP5430 MPU/GPU/CORE temperature sensor */ static struct temp_sensor_data omap5430_temp_sensor_data = { .tshut_hot = OMAP5430_TSHUT_HOT, @@ -266,3 +267,4 @@ }, .sensor_count = 3, }; +#endif /* CONFIG_OMAP5_THERMAL */