From patchwork Mon Aug 8 17:10:22 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 1046112 Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p78HD7on011849 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Mon, 8 Aug 2011 17:13:27 GMT Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QqTNj-0004tE-KV; Mon, 08 Aug 2011 17:12:52 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqTNK-0004EA-P7; Mon, 08 Aug 2011 17:12:26 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QqTLY-0003c2-1H for linux-arm-kernel@lists.infradead.org; Mon, 08 Aug 2011 17:10:40 +0000 Received: from localhost.localdomain (e102144-lin.cambridge.arm.com [10.1.69.60]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id p78H9x15020580; Mon, 8 Aug 2011 18:10:00 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] ARM: smp: set thread_info->cpu to hardware CPU number for boot thread Date: Mon, 8 Aug 2011 18:10:22 +0100 Message-Id: <1312823424-9654-5-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1312823424-9654-1-git-send-email-will.deacon@arm.com> References: <1312823424-9654-1-git-send-email-will.deacon@arm.com> X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110808_131036_336837_DE77AE6D X-CRM114-Status: GOOD ( 15.14 ) X-Spam-Score: -3.1 (---) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-3.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [217.140.96.50 listed in list.dnswl.org] -0.8 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: Will Deacon X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 08 Aug 2011 17:13:28 +0000 (UTC) On ARM, Linux assumes that the boot CPU has ID 0. If this ends up being out of sync with the hardware CPU number, we will configure the GIC incorrectly and route interrupts to the CPU with hardware ID 0. This patch implements smp_setup_processor_id for ARM, using the MPIDR to set the CPU of the boot thread. Signed-off-by: Will Deacon --- arch/arm/kernel/smp.c | 16 ++++++++++++++++ 1 files changed, 16 insertions(+), 0 deletions(-) diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d88ff02..8e60a4f 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -259,6 +259,22 @@ void __ref cpu_die(void) } #endif /* CONFIG_HOTPLUG_CPU */ +void __init smp_setup_processor_id(void) +{ + u32 mpidr; + + /* Read the MPIDR to find the hardware ID of the current CPU. */ + asm("1: mrc p15, 0, %0, c0, c0, 5\n" + " .pushsection \".alt.smp.init\", \"a\"\n" + " .long 1b\n" + " mov %0, #0\n" + " .popsection" + : "=r" (mpidr)); + + current_thread_info()->cpu = mpidr & 0xff; + printk("Booting Linux on CPU %d\n", current_thread_info()->cpu); +} + /* * Called by both boot and secondaries to move global data into * per-processor storage.