diff mbox

[4/5] drm/i915: Show CCID in engine dumps

Message ID 20180613145901.29306-4-chris@chris-wilson.co.uk (mailing list archive)
State New, archived
Headers show

Commit Message

Chris Wilson June 13, 2018, 2:59 p.m. UTC
For debugging context issues, knowing what context the GPU is
loading/using is helpful.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Mika Kuoppala June 14, 2018, 3:21 p.m. UTC | #1
Chris Wilson <chris@chris-wilson.co.uk> writes:

> For debugging context issues, knowing what context the GPU is
> loading/using is helpful.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 875bd466f3bf..5a663dda9fdc 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1273,6 +1273,8 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
>  		&engine->execlists;
>  	u64 addr;
>  
> +	if (engine->id == RCS && IS_GEN(dev_priv, 5, 7))
> +		drm_printf(m, "\tCCID: 0x%08x\n", I915_READ(CCID));

You do seem to have an option for other engines as well, but
not through +180 offset :O

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

>  	drm_printf(m, "\tRING_START: 0x%08x\n",
>  		   I915_READ(RING_START(engine->mmio_base)));
>  	drm_printf(m, "\tRING_HEAD:  0x%08x\n",
> -- 
> 2.17.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 875bd466f3bf..5a663dda9fdc 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1273,6 +1273,8 @@  static void intel_engine_print_registers(const struct intel_engine_cs *engine,
 		&engine->execlists;
 	u64 addr;
 
+	if (engine->id == RCS && IS_GEN(dev_priv, 5, 7))
+		drm_printf(m, "\tCCID: 0x%08x\n", I915_READ(CCID));
 	drm_printf(m, "\tRING_START: 0x%08x\n",
 		   I915_READ(RING_START(engine->mmio_base)));
 	drm_printf(m, "\tRING_HEAD:  0x%08x\n",