| Message ID | 1530649000-20793-1-git-send-email-clinton.a.taylor@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jul 03, 2018 at 01:16:40PM -0700, clinton.a.taylor@intel.com wrote: > From: Clint Taylor <clinton.a.taylor@intel.com> > > On GLK NUC platforms the HDMI retiming buffer needs additional disabled > time to correctly sync to a faster incoming signal. > > When measured on a scope the highspeed lines of the HDMI clock turn off > for ~400uS during a normal resolution change. The HDMI retimer on the > GLK NUC appears to require at least a full frame of quiet time before a > new faster clock can be correctly sync'd. Wait 100ms due to msleep > inaccuracies while waiting for a completed frame. Add a quirk to the > driver for GLK boards that use ITE66317 HDMI retimers. > > V2: Add more devices to the quirk list > V3: Delay increased to 100ms, check to confirm crtc type is HDMI. > V4: crtc type check extended to include _DDI and whitespace fixes > > Cc: Imre Deak <imre.deak@intel.com> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105887 > Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++++++++--- > drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++++++- > drivers/gpu/drm/i915/intel_drv.h | 3 +-- > 4 files changed, 36 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 2cefe4c..c1526ea 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -650,6 +650,7 @@ enum intel_sbi_destination { > #define QUIRK_BACKLIGHT_PRESENT (1<<3) > #define QUIRK_PIN_SWIZZLED_PAGES (1<<5) > #define QUIRK_INCREASE_T12_DELAY (1<<6) > +#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7) > > struct intel_fbdev; > struct intel_fbc_work; > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 0319825..6d33010 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -1807,15 +1807,27 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) > I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); > } > > -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, > - enum transcoder cpu_transcoder) > +/* Quirk time at 100ms for reliable operation */ > +#define DDI_DISABLED_QUIRK_TIME 100 No need for this define as I commented earlier. > + > +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) > { > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + > i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); > uint32_t val = I915_READ(reg); > - Removed w/s from the wrong spot. > val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC); > val |= TRANS_DDI_PORT_NONE; > I915_WRITE(reg, val); > + > + if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME && > + (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) || > + intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DDI))) { Hm, INTEL_OUTPUT_DDI is not a possible output type, the whole encoder enable/disable sequence would be broken with that. Even during module loading/HW readout we should already set the proper HDMI/DP type in intel_modeset_pipe_config(). Looking now at the bug report [1], the reporter is using an old kernel, where we left encoder->type at INTEL_OUTPUT_UNKNOWN during HW readout and set it correctly only after the first modeset. That could be addressed by adding INTEL_OUTPUT_UNKNOWN when backporting the workaround, but in this patch we should only check for INTEL_OUTPUT_HDMI. > + DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n"); > + msleep(DDI_DISABLED_QUIRK_TIME); Just msleep(100); as I commented earlier. [1] https://bugs.freedesktop.org/show_bug.cgi?id=105887#c110 > + } > } > > int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 681e071..8d31ff3 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5837,7 +5837,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, > intel_ddi_set_vc_payload_alloc(old_crtc_state, false); > > if (!transcoder_is_dsi(cpu_transcoder)) > - intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder); > + intel_ddi_disable_transcoder_func(old_crtc_state); > > if (INTEL_GEN(dev_priv) >= 9) > skylake_scaler_disable(intel_crtc); > @@ -14847,6 +14847,17 @@ static void quirk_increase_t12_delay(struct drm_device *dev) > DRM_INFO("Applying T12 delay quirk\n"); > } > > +/* GeminiLake NUC HDMI outputs require additional off time > + * this allows the onboard retimer to correctly sync to signal > + */ > +static void quirk_increase_ddi_disabled_time(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv = to_i915(dev); > + > + dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME; > + DRM_INFO("Applying Increase DDI Disabled quirk\n"); > +} > + > struct intel_quirk { > int device; > int subsystem_vendor; > @@ -14933,6 +14944,13 @@ static int intel_dmi_reverse_brightness(const struct dmi_system_id *id) > > /* Toshiba Satellite P50-C-18C */ > { 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay }, > + > + /* GeminiLake NUC */ > + { 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, > + { 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, > + /* ASRock ITX*/ > + { 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, > + { 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, > }; > > static void intel_init_quirks(struct drm_device *dev) > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h > index b9b7032..2490221 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -1384,8 +1384,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, > void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); > bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); > void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state); > -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, > - enum transcoder cpu_transcoder); > +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); > void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state); > void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); > void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state); > -- > 1.9.1 >
Hi Imre, Clinton, Am Wed, 4 Jul 2018 13:05:59 +0300 schrieb Imre Deak <imre.deak@intel.com>: > On Tue, Jul 03, 2018 at 01:16:40PM -0700, clinton.a.taylor@intel.com wrote: > > From: Clint Taylor <clinton.a.taylor@intel.com> > > > > On GLK NUC platforms the HDMI retiming buffer needs additional disabled > > time to correctly sync to a faster incoming signal. > > > > When measured on a scope the highspeed lines of the HDMI clock turn off > > for ~400uS during a normal resolution change. The HDMI retimer on the > > GLK NUC appears to require at least a full frame of quiet time before a > > new faster clock can be correctly sync'd. Wait 100ms due to msleep > > inaccuracies while waiting for a completed frame. Add a quirk to the > > driver for GLK boards that use ITE66317 HDMI retimers. > > > > V2: Add more devices to the quirk list > > V3: Delay increased to 100ms, check to confirm crtc type is HDMI. > > V4: crtc type check extended to include _DDI and whitespace fixes > > > > Cc: Imre Deak <imre.deak@intel.com> > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105887 > > Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.h | 1 + > > drivers/gpu/drm/i915/intel_ddi.c | 18 +++++++++++++++--- > > drivers/gpu/drm/i915/intel_display.c | 20 +++++++++++++++++++- > > drivers/gpu/drm/i915/intel_drv.h | 3 +-- > > 4 files changed, 36 insertions(+), 6 deletions(-) > > > > [...] > > val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC); > > val |= TRANS_DDI_PORT_NONE; > > I915_WRITE(reg, val); > > + > > + if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME && > > + (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) || > > + intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DDI))) { > > Hm, INTEL_OUTPUT_DDI is not a possible output type, the whole encoder > enable/disable sequence would be broken with that. Even during module > loading/HW readout we should already set the proper HDMI/DP type in > intel_modeset_pipe_config(). > > Looking now at the bug report [1], the reporter is using an old kernel, > where we left encoder->type at INTEL_OUTPUT_UNKNOWN during HW readout > and set it correctly only after the first modeset. That could be > addressed by adding INTEL_OUTPUT_UNKNOWN when backporting the workaround, > but in this patch we should only check for INTEL_OUTPUT_HDMI. > > [1] https://bugs.freedesktop.org/show_bug.cgi?id=105887#c110 You're correct, this (INTEL_OUTPUT_UNKNOWN being set) indeed seems to be something with the i915 driver in kernel 4.15. I've just built a Kernel image/package from 4.17.4 with this patch applied, plus the DRM_ERROR print that logs the connector to the kernel log, and in fact on 4.17.x it's already on INTEL_OUTPUT_HDMI right after boot/driver load/hwinit (always 64), so for upstream the _UNKNOWN or _DDI check probably really isn't necessary. Posting links to the bug report in a second. Sorry for any troubles or additional work the _UNKNOWN report/suggestion might have caused. For v5, given that the logic won't change, feel free to add my Tested-by: Daniel Scheller <d.scheller.oss@gmail.com> Best regards, Daniel Scheller
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2cefe4c..c1526ea 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -650,6 +650,7 @@ enum intel_sbi_destination { #define QUIRK_BACKLIGHT_PRESENT (1<<3) #define QUIRK_PIN_SWIZZLED_PAGES (1<<5) #define QUIRK_INCREASE_T12_DELAY (1<<6) +#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7) struct intel_fbdev; struct intel_fbc_work; diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 0319825..6d33010 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1807,15 +1807,27 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp); } -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, - enum transcoder cpu_transcoder) +/* Quirk time at 100ms for reliable operation */ +#define DDI_DISABLED_QUIRK_TIME 100 + +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state) { + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder); uint32_t val = I915_READ(reg); - val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK | TRANS_DDI_DP_VC_PAYLOAD_ALLOC); val |= TRANS_DDI_PORT_NONE; I915_WRITE(reg, val); + + if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME && + (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI) || + intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DDI))) { + DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n"); + msleep(DDI_DISABLED_QUIRK_TIME); + } } int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder, diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 681e071..8d31ff3 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5837,7 +5837,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, intel_ddi_set_vc_payload_alloc(old_crtc_state, false); if (!transcoder_is_dsi(cpu_transcoder)) - intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder); + intel_ddi_disable_transcoder_func(old_crtc_state); if (INTEL_GEN(dev_priv) >= 9) skylake_scaler_disable(intel_crtc); @@ -14847,6 +14847,17 @@ static void quirk_increase_t12_delay(struct drm_device *dev) DRM_INFO("Applying T12 delay quirk\n"); } +/* GeminiLake NUC HDMI outputs require additional off time + * this allows the onboard retimer to correctly sync to signal + */ +static void quirk_increase_ddi_disabled_time(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = to_i915(dev); + + dev_priv->quirks |= QUIRK_INCREASE_DDI_DISABLED_TIME; + DRM_INFO("Applying Increase DDI Disabled quirk\n"); +} + struct intel_quirk { int device; int subsystem_vendor; @@ -14933,6 +14944,13 @@ static int intel_dmi_reverse_brightness(const struct dmi_system_id *id) /* Toshiba Satellite P50-C-18C */ { 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay }, + + /* GeminiLake NUC */ + { 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, + { 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time }, + /* ASRock ITX*/ + { 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, + { 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time }, }; static void intel_init_quirks(struct drm_device *dev) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b9b7032..2490221 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1384,8 +1384,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port); bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe); void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state); -void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv, - enum transcoder cpu_transcoder); +void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state); void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state); void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state); void intel_ddi_set_pipe_settings(const struct intel_crtc_state *crtc_state);