From patchwork Wed Aug 10 00:02:24 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Klossner X-Patchwork-Id: 1051462 X-Patchwork-Delegate: bhelgaas@google.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p7A0C7Ds001331 for ; Wed, 10 Aug 2011 00:12:08 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751951Ab1HJALy (ORCPT ); Tue, 9 Aug 2011 20:11:54 -0400 Received: from usa7109mr002.acs-inc.com ([63.101.151.11]:18317 "EHLO USA7109MR002.ACS-INC.COM" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751981Ab1HJALx (ORCPT ); Tue, 9 Aug 2011 20:11:53 -0400 X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Wed, 10 Aug 2011 00:12:08 +0000 (UTC) X-Greylist: delayed 567 seconds by postgrey-1.27 at vger.kernel.org; Tue, 09 Aug 2011 20:11:53 EDT X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: Ao0FAJjJQU4N/Z0f/2dsb2JhbAA/mCUBjxp3gVYBF4IREsQ9hkYEh12LK5EL Received: from pogo.cesa.opbu.xerox.com ([13.253.157.31]) by USA7109MR002.ACS-INC.COM with ESMTP; 09 Aug 2011 19:02:25 -0500 Received: from cesa.opbu.xerox.com (dea179.dev.opbu.xerox.com [13.123.5.179]) by pogo.cesa.opbu.xerox.com (8.13.6+Sun/8.13.6) with ESMTP id p7A02OcR001266; Tue, 9 Aug 2011 17:02:25 -0700 (PDT) Message-Id: <201108100002.p7A02OcR001266@pogo.cesa.opbu.xerox.com> To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] PCI probe: fix "can't handle 64-bit address space for bridge" on x86-32 PAE Date: Tue, 09 Aug 2011 17:02:24 -0700 From: Andrew Klossner Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org If sizeof(long) is 4 bytes but sizeof(phys_addr_t) is 8 bytes, don't fail to configure a bridge for PCI prefetchable memory space that extends beyond 4GB. The problem was encountered on an embedded system using a Freescale MPC8536 PowerPC processor. The problem is possible on x86-32 systems with PAE, although it has not been observed in the wild. This patch preserves the current behavior for any oddball systems on which sizeof(long) is 8 bytes and sizeof(phys_addr_t) is 4 bytes. Signed-off-by: Andrew Klossner --- drivers/pci/probe.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index 795c902..1385bd3 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c @@ -316,7 +316,11 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child) { struct pci_dev *dev = child->self; u16 mem_base_lo, mem_limit_lo; +#if defined CONFIG_PHYS_ADDR_T_64BIT & BITS_PER_LONG != 64 + phys_addr_t base, limit; +#else unsigned long base, limit; +#endif struct resource *res; res = child->resource[2]; @@ -339,6 +343,9 @@ static void __devinit pci_read_bridge_mmio_pref(struct pci_bus *child) #if BITS_PER_LONG == 64 base |= ((long) mem_base_hi) << 32; limit |= ((long) mem_limit_hi) << 32; +#elif defined CONFIG_PHYS_ADDR_T_64BIT + base |= ((phys_addr_t) mem_base_hi) << 32; + limit |= ((phys_addr_t) mem_limit_hi) << 32; #else if (mem_base_hi || mem_limit_hi) { dev_err(&dev->dev, "can't handle 64-bit "