From patchwork Wed Jul 11 10:59:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Hildenbrand X-Patchwork-Id: 10519333 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 52BB96032A for ; Wed, 11 Jul 2018 10:59:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 420DB28C96 for ; Wed, 11 Jul 2018 10:59:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3680C28CA3; Wed, 11 Jul 2018 10:59:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C2DFB28C96 for ; Wed, 11 Jul 2018 10:59:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732692AbeGKLDH (ORCPT ); Wed, 11 Jul 2018 07:03:07 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:34484 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726641AbeGKLDG (ORCPT ); Wed, 11 Jul 2018 07:03:06 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.rdu2.redhat.com [10.11.54.5]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 96355701E9; Wed, 11 Jul 2018 10:59:19 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-231.ams2.redhat.com [10.36.117.231]) by smtp.corp.redhat.com (Postfix) with ESMTP id 76C951C668; Wed, 11 Jul 2018 10:59:18 +0000 (UTC) From: David Hildenbrand To: kvm@vger.kernel.org Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Thomas Huth , david@redhat.com, Janosch Frank Subject: [kvm-unit-tests PULL] s390x: Catch all exceptions Date: Wed, 11 Jul 2018 12:59:14 +0200 Message-Id: <20180711105914.18020-2-david@redhat.com> In-Reply-To: <20180711105914.18020-1-david@redhat.com> References: <20180711105914.18020-1-david@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.11.54.5 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Wed, 11 Jul 2018 10:59:19 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Wed, 11 Jul 2018 10:59:19 +0000 (UTC) for IP:'10.11.54.5' DOMAIN:'int-mx05.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'david@redhat.com' RCPT:'' Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Janosch Frank Right now we only catch the exceptions that we really expect to receive. Let's at least catch all of them and abort if any of the unexpected ones fell on our foot. Signed-off-by: Janosch Frank Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- lib/s390x/asm/interrupt.h | 4 +++ lib/s390x/interrupt.c | 24 ++++++++++++++++ s390x/cstart64.S | 58 +++++++++++++++++++++++++++++++++++++-- 3 files changed, 83 insertions(+), 3 deletions(-) diff --git a/lib/s390x/asm/interrupt.h b/lib/s390x/asm/interrupt.h index 3ccc8e3..b3abd63 100644 --- a/lib/s390x/asm/interrupt.h +++ b/lib/s390x/asm/interrupt.h @@ -12,6 +12,10 @@ #include void handle_pgm_int(void); +void handle_ext_int(void); +void handle_mcck_int(void); +void handle_io_int(void); +void handle_svc_int(void); void expect_pgm_int(void); uint16_t clear_pgm_int(void); void check_pgm_int_code(uint16_t code); diff --git a/lib/s390x/interrupt.c b/lib/s390x/interrupt.c index bc44e3a..848d5f2 100644 --- a/lib/s390x/interrupt.c +++ b/lib/s390x/interrupt.c @@ -104,3 +104,27 @@ void handle_pgm_int(void) pgm_int_expected = false; fixup_pgm_int(); } + +void handle_ext_int(void) +{ + report_abort("Unexpected external call interrupt: at %#lx", + lc->ext_old_psw.addr); +} + +void handle_mcck_int(void) +{ + report_abort("Unexpected machine check interrupt: at %#lx", + lc->mcck_old_psw.addr); +} + +void handle_io_int(void) +{ + report_abort("Unexpected io interrupt: at %#lx", + lc->io_old_psw.addr); +} + +void handle_svc_int(void) +{ + report_abort("Unexpected service call interrupt: at %#lx", + lc->svc_old_psw.addr); +} diff --git a/s390x/cstart64.S b/s390x/cstart64.S index 9a26ed3..2f02d4d 100644 --- a/s390x/cstart64.S +++ b/s390x/cstart64.S @@ -26,6 +26,18 @@ init_psw_cont: /* setup pgm interrupt handler */ larl %r1, pgm_int_psw mvc GEN_LC_PGM_NEW_PSW(16), 0(%r1) + /* setup ext interrupt handler */ + larl %r1, ext_int_psw + mvc GEN_LC_EXT_NEW_PSW(16), 0(%r1) + /* setup mcck interrupt handler */ + larl %r1, mcck_int_psw + mvc GEN_LC_MCCK_NEW_PSW(16), 0(%r1) + /* setup io interrupt handler */ + larl %r1, ext_int_psw + mvc GEN_LC_IO_NEW_PSW(16), 0(%r1) + /* setup svc interrupt handler */ + larl %r1, mcck_int_psw + mvc GEN_LC_SVC_NEW_PSW(16), 0(%r1) /* setup cr0, enabling e.g. AFP-register control */ larl %r1, initital_cr0 lctlg %c0, %c0, 0(%r1) @@ -42,7 +54,7 @@ init_psw_cont: /* call exit() */ j exit -pgm_int: + .macro SAVE_REGS /* save grs 0-15 */ stmg %r0, %r15, GEN_LC_SW_INT_GRS /* save fprs 0-15 + fpc */ @@ -64,8 +76,9 @@ pgm_int: std %f14, 112(%r1) std %f15, 120(%r1) stfpc GEN_LC_SW_INT_FPC - /* call our c handler */ - brasl %r14, handle_pgm_int + .endm + + .macro RESTORE_REGS /* restore fprs 0-15 + fpc */ larl %r1, GEN_LC_SW_INT_FPRS ld %f0, 0(%r1) @@ -87,13 +100,52 @@ pgm_int: lfpc GEN_LC_SW_INT_FPC /* restore grs 0-15 */ lmg %r0, %r15, GEN_LC_SW_INT_GRS + .endm + +.section .text +pgm_int: + SAVE_REGS + brasl %r14, handle_pgm_int + RESTORE_REGS lpswe GEN_LC_PGM_OLD_PSW +ext_int: + SAVE_REGS + brasl %r14, handle_ext_int + RESTORE_REGS + lpswe GEN_LC_EXT_OLD_PSW + +mcck_int: + SAVE_REGS + brasl %r14, handle_mcck_int + RESTORE_REGS + lpswe GEN_LC_MCCK_OLD_PSW + +io_int: + SAVE_REGS + brasl %r14, handle_io_int + RESTORE_REGS + lpswe GEN_LC_IO_OLD_PSW + +svc_int: + SAVE_REGS + brasl %r14, handle_svc_int + RESTORE_REGS + lpswe GEN_LC_SVC_OLD_PSW + .align 8 initital_psw: .quad 0x0000000180000000, init_psw_cont pgm_int_psw: .quad 0x0000000180000000, pgm_int +ext_int_psw: + .quad 0x0000000180000000, ext_int +mcck_int_psw: + .quad 0x0000000180000000, mcck_int +io_int_psw: + .quad 0x0000000180000000, io_int +svc_int_psw: + .quad 0x0000000180000000, svc_int initital_cr0: /* enable AFP-register control, so FP regs (+BFP instr) can be used */ .quad 0x0000000000040000