crypto: correct obvious misspelling "cypto-controller"
diff mbox series

Message ID alpine.LFD.2.21.1808060747050.13239@localhost.localdomain
State Not Applicable
Delegated to: Herbert Xu
Headers show
Series
  • crypto: correct obvious misspelling "cypto-controller"
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Commit Message

Robert P. J. Day Aug. 6, 2018, 11:48 a.m. UTC
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

---


rday

Comments

Herbert Xu Sept. 4, 2018, 3:09 a.m. UTC | #1
On Mon, Aug 06, 2018 at 07:48:52AM -0400, Robert P. J. Day wrote:
> 
> Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

Adding Rob Herring <robh@kernel.org> to the cc list.

> 
> ---
> 
> diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> index 5e2ba385b8c9..53e39d5f94e7 100644
> --- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> +++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
> @@ -16,7 +16,7 @@ Required properties:
> 
>  Examples:
> 
> -	crypto: cypto-controller@ff8a0000 {
> +	crypto: crypto-controller@ff8a0000 {
>  		compatible = "rockchip,rk3288-crypto";
>  		reg = <0xff8a0000 0x4000>;
>  		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index d7e49d29ace5..dcfdb2c0d206 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -942,7 +942,7 @@
>  		status = "disabled";
>  	};
> 
> -	crypto: cypto-controller@ff8a0000 {
> +	crypto: crypto-controller@ff8a0000 {
>  		compatible = "rockchip,rk3288-crypto";
>  		reg = <0x0 0xff8a0000 0x0 0x4000>;
>  		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
> 
> rday
> 
> -- 
> 
> ========================================================================
> Robert P. J. Day                                 Ottawa, Ontario, CANADA
>                   http://crashcourse.ca/dokuwiki
> 
> Twitter:                                       http://twitter.com/rpjday
> LinkedIn:                               http://ca.linkedin.com/in/rpjday
> ========================================================================
Rob Herring Sept. 4, 2018, 2:18 p.m. UTC | #2
On Mon, Sep 3, 2018 at 10:09 PM Herbert Xu <herbert@gondor.apana.org.au> wrote:
>
> On Mon, Aug 06, 2018 at 07:48:52AM -0400, Robert P. J. Day wrote:
> >
> > Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
>
> Adding Rob Herring <robh@kernel.org> to the cc list.

Please resend to DT list if you want me to take it. Otherwise,

Acked-by: Rob Herring <robh@kernel.org>
Herbert Xu Sept. 5, 2018, 2:01 a.m. UTC | #3
On Tue, Sep 04, 2018 at 09:18:32AM -0500, Rob Herring wrote:
> On Mon, Sep 3, 2018 at 10:09 PM Herbert Xu <herbert@gondor.apana.org.au> wrote:
> >
> > On Mon, Aug 06, 2018 at 07:48:52AM -0400, Robert P. J. Day wrote:
> > >
> > > Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
> >
> > Adding Rob Herring <robh@kernel.org> to the cc list.
> 
> Please resend to DT list if you want me to take it. Otherwise,
> 
> Acked-by: Rob Herring <robh@kernel.org>

Thanks Rob.  Robert, can you resend this to the DT list?

Thanks,

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
index 5e2ba385b8c9..53e39d5f94e7 100644
--- a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
+++ b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt
@@ -16,7 +16,7 @@  Required properties:

 Examples:

-	crypto: cypto-controller@ff8a0000 {
+	crypto: crypto-controller@ff8a0000 {
 		compatible = "rockchip,rk3288-crypto";
 		reg = <0xff8a0000 0x4000>;
 		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index d7e49d29ace5..dcfdb2c0d206 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -942,7 +942,7 @@ 
 		status = "disabled";
 	};

-	crypto: cypto-controller@ff8a0000 {
+	crypto: crypto-controller@ff8a0000 {
 		compatible = "rockchip,rk3288-crypto";
 		reg = <0x0 0xff8a0000 0x0 0x4000>;
 		interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;