@@ -211,7 +211,7 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
u32 dsmr;
u32 escr;
- if (rcdu->info->dpll_ch & (1 << rcrtc->index)) {
+ if (rcdu->info->dpll_mask & (1 << rcrtc->index)) {
unsigned long target = mode_clock;
struct dpll_info dpll = { 0 };
unsigned long extclk;
@@ -215,7 +215,7 @@ static const struct rcar_du_device_info rcar_du_r8a7795_info = {
},
},
.num_lvds = 1,
- .dpll_ch = BIT(2) | BIT(1),
+ .dpll_mask = BIT(2) | BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a7796_info = {
@@ -243,7 +243,7 @@ static const struct rcar_du_device_info rcar_du_r8a7796_info = {
},
},
.num_lvds = 1,
- .dpll_ch = BIT(1),
+ .dpll_mask = BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a77965_info = {
@@ -271,7 +271,7 @@ static const struct rcar_du_device_info rcar_du_r8a77965_info = {
},
},
.num_lvds = 1,
- .dpll_ch = BIT(1),
+ .dpll_mask = BIT(1),
};
static const struct rcar_du_device_info rcar_du_r8a77970_info = {
@@ -55,6 +55,7 @@ struct rcar_du_output_routing {
* @channels_mask: bit mask of available DU channels
* @routes: array of CRTC to output routes, indexed by output (RCAR_DU_OUTPUT_*)
* @num_lvds: number of internal LVDS encoders
+ * @dpll_mask: mask of DU channels equipped with a DPLL
*/
struct rcar_du_device_info {
unsigned int gen;
@@ -63,7 +64,7 @@ struct rcar_du_device_info {
unsigned int channels_mask;
struct rcar_du_output_routing routes[RCAR_DU_OUTPUT_MAX];
unsigned int num_lvds;
- unsigned int dpll_ch;
+ unsigned int dpll_mask;
};
#define RCAR_DU_MAX_CRTCS 4
Document and re-name the 'dpll_ch' field to a more precise 'dpll_mask' for consistency with the 'channels_mask' field defined in 'struct rcar_du_device_info'. Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> --- drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 2 +- drivers/gpu/drm/rcar-du/rcar_du_drv.c | 6 +++--- drivers/gpu/drm/rcar-du/rcar_du_drv.h | 3 ++- 3 files changed, 6 insertions(+), 5 deletions(-)