diff mbox series

[v3,30/30] ARM: sun8i: a83t: full range OPP tables and CPUfreq

Message ID 20180830154518.29507-31-embed3d@gmail.com (mailing list archive)
State New, archived
Headers show
Series IIO-based thermal sensor driver for Allwinner H3 and A83T SoC | expand

Commit Message

Philipp Rossak Aug. 30, 2018, 3:45 p.m. UTC
Since we have now thermal trotteling enabeled we can now add the full
range of the OPP table.

The operating points were found in Allwinner BSP and fex files.

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

Comments

Ondřej Jirman Aug. 30, 2018, 4:38 p.m. UTC | #1
Hello,

On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
> Since we have now thermal trotteling enabeled we can now add the full
> range of the OPP table.

I'm not sure we can. I have a tablet with A83T SoC and it gets unstable
at these frequencies even with thermal throttling on mainline kernel. (Though
I have my own THS driver, but I doubt a different driver will change much.)

There might be some other issue left in the cpufreq code. I'll let others
test this on a better cooled boards though.

Did you/someone test this?

regards,
  o.

> The operating points were found in Allwinner BSP and fex files.
> 
> Signed-off-by: Philipp Rossak <embed3d@gmail.com>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 78aa448e869f..ddcf404f9c80 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -250,6 +250,22 @@
>  			opp-microvolt = <840000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
>  		};
> +
> +		opp-1608000000 {
> +			opp-hz = /bits/ 64 <1608000000>;
> +			opp-microvolt = <920000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-1800000000 { /* BOOT FREQ */
> +			opp-hz = /bits/ 64 <1800000000>;
> +			opp-microvolt = <1000000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-2016000000 {
> +			opp-hz = /bits/ 64 <2016000000>;
> +			opp-microvolt = <1080000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
>  	};
>  
>  	cpu1_opp_table: opp_table1 {
> @@ -303,6 +319,22 @@
>  			opp-microvolt = <840000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
>  		};
> +
> +		opp-1608000000 {
> +			opp-hz = /bits/ 64 <1608000000>;
> +			opp-microvolt = <920000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-1800000000 { /* BOOT FREQ */
> +			opp-hz = /bits/ 64 <1800000000>;
> +			opp-microvolt = <1000000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-2016000000 {
> +			opp-hz = /bits/ 64 <2016000000>;
> +			opp-microvolt = <1080000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
>  	};
>  
>  	soc {
> -- 
> 2.11.0
> 
> -- 
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Philipp Rossak Aug. 30, 2018, 8:29 p.m. UTC | #2
On 30.08.2018 18:38, Ondřej Jirman wrote:
> Hello,
> 
> On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
>> Since we have now thermal trotteling enabeled we can now add the full
>> range of the OPP table.
> 
> I'm not sure we can. I have a tablet with A83T SoC and it gets unstable
> at these frequencies even with thermal throttling on mainline kernel. (Though
> I have my own THS driver, but I doubt a different driver will change much.)
> 
> There might be some other issue left in the cpufreq code. I'll let others
> test this on a better cooled boards though.
> 
> Did you/someone test this?
> 
> regards,
>    o.
I have a good cooled device, with big heatsinks and a fan blowing 
directly on it. But there is some big issue left!

cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq
[   85.076270] Unable to handle kernel paging request at virtual address 
2e83c684
[   85.083519] pgd = (ptrval)
[   85.086220] [2e83c684] *pgd=00000000
[   85.089813] Internal error: Oops: 5 [#3] SMP ARM
[   85.094429] Modules linked in:
[   85.097483] CPU: 4 PID: 127 Comm: sh Tainted: G      D W 
4.18.0-00031-g8f59917020b9-dirty #2
[   85.106597] Hardware name: Allwinner A83t board
[   85.111130] PC is at down_write+0x14/0x54
[   85.115135] LR is at anon_vma_clone+0x9c/0x1e4
[   85.119571] pc : [<c066a3d4>]    lr : [<c01e71b8>]    psr: 60000013
[   85.125826] sp : ede45e70  ip : 000001a0  fp : eea3c690
[   85.131041] r10: eea4193c  r9 : 00400200  r8 : c0a942a4
[   85.136255] r7 : 2e83c680  r6 : eea3aea0  r5 : eea3b220  r4 : 2e83c684
[   85.142771] r3 : ffff0001  r2 : 2e83c680  r1 : ede45e58  r0 : 2e83c684
[   85.149287] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM 
Segment none
[   85.156410] Control: 10c5387d  Table: 6df1806a  DAC: 00000051
[   85.162145] Process sh (pid: 127, stack limit = 0x(ptrval))
[   85.167706] Stack: (0xede45e70 to 0xede46000)
[   85.172057] 5e60:                                     eea3b900 
c01e71b8 eea41900 ffebd684
[   85.180221] 5e80: c0a637b0 c07ea07c c0a10754 eea3aea0 eea41900 
c0a04c48 edd71880 00000000
[   85.188385] 5ea0: eea3aea0 eea41900 c0a69030 c01e7324 00000002 
edd701c0 c0a04c48 edd71880
[   85.196548] 5ec0: 00000000 c011c2f4 00000069 00000000 00000002 
00000000 00000000 00000000
[   85.204711] 5ee0: 00000000 edd701c0 edd82280 eea3af00 edd701f8 
edd718b8 eea3af08 eea3af14
[   85.212875] 5f00: eea3af10 ede44000 edd8255c 01200011 00000000 
ede45f14 ede45f14 b61ea11a
[   85.221039] 5f20: edd805c0 01200011 c0a04c48 beef38b0 00000000 
00000000 00000000 00000078
[   85.229202] 5f40: beef38dc c011ce0c 00000000 00000000 00000000 
ede44000 000000ae c012d9e0
[   85.237365] 5f60: eea43480 00000000 04000000 b61ea11a 00000000 
b6fb5068 b6f8b670 beef38b0
[   85.245529] 5f80: 00000078 c0101204 ede44000 00000078 beef38dc 
c011d1bc b6fb5068 00000000
[   85.253692] 5fa0: 000000ae c0101000 b6fb5068 b6f8b670 01200011 
00000000 00000000 00000000
[   85.261856] 5fc0: b6fb5068 b6f8b670 beef38b0 00000078 b6f8ac4c 
b6fb5490 ffffffff beef38dc
[   85.270020] 5fe0: 00000002 beef38b0 00000000 b6f5bfd0 60000010 
01200011 00000000 00000000
[   85.278191] [<c066a3d4>] (down_write) from [<c01e71b8>] 
(anon_vma_clone+0x9c/0x1e4)
[   85.285836] [<c01e71b8>] (anon_vma_clone) from [<c01e7324>] 
(anon_vma_fork+0x24/0x160)
[   85.293741] [<c01e7324>] (anon_vma_fork) from [<c011c2f4>] 
(copy_process.part.3+0xbc4/0x158c)
[   85.302253] [<c011c2f4>] (copy_process.part.3) from [<c011ce0c>] 
(_do_fork+0xb0/0x394)
[   85.310157] [<c011ce0c>] (_do_fork) from [<c011d1bc>] 
(sys_clone+0x20/0x28)
[   85.317107] [<c011d1bc>] (sys_clone) from [<c0101000>] 
(ret_fast_syscall+0x0/0x54)
[   85.324661] Exception stack(0xede45fa8 to 0xede45ff0)
[   85.329704] 5fa0:                   b6fb5068 b6f8b670 01200011 
00000000 00000000 00000000
[   85.337868] 5fc0: b6fb5068 b6f8b670 beef38b0 00000078 b6f8ac4c 
b6fb5490 ffffffff beef38dc
[   85.346021] 5fe0: 00000002 beef38b0 00000000 b6f5bfd0
[   85.351068] Code: e1a04000 f590f000 e3a03001 e34f3fff (e1902f9f)
[   85.357200] ---[ end trace aad10e0b4fcbf194 ]---


OR

cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_cur_freq
[   73.873939] ------------[ cut here ]------------
[   73.878584] WARNING: CPU: 5 PID: 132 at mm/rmap.c:235 
unlink_anon_vmas+0x1f4/0x1fc
[   73.886210] Modules linked in:
[   73.889276] CPU: 5 PID: 132 Comm: sh Tainted: G      D 
4.18.0-00031-g8f59917020b9-dirty #2
[   73.898391] Hardware name: Allwinner A83t board
[   73.902934] [<c010f310>] (unwind_backtrace) from [<c010bd54>] 
(show_stack+0x10/0x14)
[   73.910671] [<c010bd54>] (show_stack) from [<c0652f98>] 
(dump_stack+0x84/0x98)
[   73.917887] [<c0652f98>] (dump_stack) from [<c011dd14>] 
(__warn+0xfc/0x114)
[   73.924840] [<c011dd14>] (__warn) from [<c011de44>] 
(warn_slowpath_null+0x40/0x48)
[   73.932398] [<c011de44>] (warn_slowpath_null) from [<c01e7114>] 
(unlink_anon_vmas+0x1f4/0x1fc)
[   73.941006] [<c01e7114>] (unlink_anon_vmas) from [<c01da874>] 
(free_pgtables+0x78/0xcc)
[   73.948999] [<c01da874>] (free_pgtables) from [<c01e1e88>] 
(exit_mmap+0xe4/0x188)
[   73.956471] [<c01e1e88>] (exit_mmap) from [<c011b3a8>] (mmput+0x40/0xf0)
[   73.963169] [<c011b3a8>] (mmput) from [<c0208f1c>] 
(flush_old_exec+0x550/0x6e0)
[   73.970473] [<c0208f1c>] (flush_old_exec) from [<c0250e74>] 
(load_elf_binary+0x2f0/0x1324)
[   73.978726] [<c0250e74>] (load_elf_binary) from [<c02086c4>] 
(search_binary_handler+0xa0/0x234)
[   73.987412] [<c02086c4>] (search_binary_handler) from [<c02098b0>] 
(__do_execve_file+0x57c/0x6bc)
[   73.996271] [<c02098b0>] (__do_execve_file) from [<c0209c54>] 
(sys_execve+0x34/0x3c)
[   74.004003] [<c0209c54>] (sys_execve) from [<c0101000>] 
(ret_fast_syscall+0x0/0x54)
[   74.011645] Exception stack(0xede71fa8 to 0xede71ff0)
[   74.016690] 1fa0:                   000c530c 000c52d0 000c530c 
000c52d0 000c52dc 00000000
[   74.024853] 1fc0: 000c530c 000c52d0 000a2a0c 0000000b 000c52dc 
000c4b5c 000c4b5c 000c530c
[   74.033016] 1fe0: b6f25ed4 beef38b8 00042038 b6f25ee0
[   74.038086] ---[ end trace aad10e0b4fcbf192 ]---
[   74.042726] Unable to handle kernel paging request at virtual address 
2e83c684
[   74.049958] pgd = (ptrval)
[   74.052665] [2e83c684] *pgd=00000000
[   74.056243] Internal error: Oops: 5 [#2] SMP ARM
[   74.060851] Modules linked in:
[   74.063904] CPU: 5 PID: 132 Comm: sh Tainted: G      D W 
4.18.0-00031-g8f59917020b9-dirty #2
[   74.073019] Hardware name: Allwinner A83t board
[   74.077548] PC is at down_write+0x14/0x54
[   74.081553] LR is at unlink_anon_vmas+0xa8/0x1fc
[   74.086160] pc : [<c066a3d4>]    lr : [<c01e6fc8>]    psr: 60000013
[   74.092416] sp : ede71d88  ip : 00000000  fp : eea3b680
[   74.097630] r10: eea3c690  r9 : c0a637b0  r8 : eea41e40
[   74.102845] r7 : c0a942a4  r6 : 2e83c680  r5 : eea41e7c  r4 : 2e83c684
[   74.109360] r3 : ffff0001  r2 : ffff0001  r1 : 00000000  r0 : 2e83c684
[   74.115878] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM 
Segment none
[   74.123000] Control: 10c5387d  Table: 6de6406a  DAC: 00000051
[   74.128735] Process sh (pid: 132, stack limit = 0x(ptrval))
[   74.134296] Stack: (0xede71d88 to 0xede72000)
[   74.138645] 1d80:                   eea41e74 c01e6fc8 c07ea07c 
eea3c690 eea41f00 eea41e40
[   74.146809] 1da0: eea41d20 b6f17000 ede71df4 00002000 00000000 
edd9c300 ede71e90 c01da874
[   74.154973] 1dc0: b6f17000 c01dbf94 00000000 eea41360 00000000 
c0a04c48 edd716c0 edd826b0
[   74.163136] 1de0: edd90540 c01e1e88 eeabc6c8 00000001 00000000 
edd716c0 00000001 00000000
[   74.171299] 1e00: 00000000 ffffffff c0a68f40 00000000 000000ac 
00000400 eeacf000 eeb9f038
[   74.179463] 1e20: 00000100 b61ea11a 00000000 edd716c0 00000000 
edda8540 edd716c0 b61ea11a
[   74.187627] 1e40: edd716c0 00000000 edda8540 c011b3a8 edd716c0 
edd82280 edda8540 c0208f1c
[   74.195790] 1e60: 000000a0 c024f610 000000d4 c0a04c48 eeab4100 
00000000 edd9c300 eeab4134
[   74.203954] 1e80: eeabc6c0 edd9c400 ede71e90 c0250e74 effcec80 
effcec80 00000001 eeabc6c0
[   74.212118] 1ea0: eeaab180 eeabb000 00000000 c01d9704 effcec80 
80000013 beffff22 00000000
[   74.220281] 1ec0: ede70000 effcec80 edd9c300 c01d9344 00000000 
00000004 beffff22 00000000
[   74.228445] 1ee0: 00000034 00000000 00000011 ede71f20 00000000 
00000000 00000051 b61ea11a
[   74.236609] 1f00: befff000 c0a1130c edd9c300 c0a9558c fffffff8 
c0a10e3c c0a9558c c07ebbb4
[   74.244772] 1f20: 00000001 c02086c4 c0a0bbd4 c0a04c48 edda2000 
ffffe000 00000084 edd9c300
[   74.252936] 1f40: 00000001 00000000 00000000 c02098b0 c0a04f34 
edda8540 eeab8de0 edda8578
[   74.261100] 1f60: 00000000 b61ea11a 000c530c 000c52d0 000c52dc 
000a2a0c 0000000b c0101204
[   74.269263] 1f80: ede70000 0000000b 000c530c c0209c54 00000000 
00000000 20000010 000c530c
[   74.277428] 1fa0: 000c52d0 c0101000 000c530c 000c52d0 000c530c 
000c52d0 000c52dc 00000000
[   74.285592] 1fc0: 000c530c 000c52d0 000a2a0c 0000000b 000c52dc 
000c4b5c 000c4b5c 000c530c
[   74.293755] 1fe0: b6f25ed4 beef38b8 00042038 b6f25ee0 a0000010 
000c530c 00000000 00000000
[   74.301924] [<c066a3d4>] (down_write) from [<c01e6fc8>] 
(unlink_anon_vmas+0xa8/0x1fc)
[   74.309743] [<c01e6fc8>] (unlink_anon_vmas) from [<c01da874>] 
(free_pgtables+0x78/0xcc)
[   74.317733] [<c01da874>] (free_pgtables) from [<c01e1e88>] 
(exit_mmap+0xe4/0x188)
[   74.325204] [<c01e1e88>] (exit_mmap) from [<c011b3a8>] (mmput+0x40/0xf0)
[   74.331898] [<c011b3a8>] (mmput) from [<c0208f1c>] 
(flush_old_exec+0x550/0x6e0)
[   74.339195] [<c0208f1c>] (flush_old_exec) from [<c0250e74>] 
(load_elf_binary+0x2f0/0x1324)
[   74.347447] [<c0250e74>] (load_elf_binary) from [<c02086c4>] 
(search_binary_handler+0xa0/0x234)
[   74.356134] [<c02086c4>] (search_binary_handler) from [<c02098b0>] 
(__do_execve_file+0x57c/0x6bc)
[   74.364993] [<c02098b0>] (__do_execve_file) from [<c0209c54>] 
(sys_execve+0x34/0x3c)
[   74.372724] [<c0209c54>] (sys_execve) from [<c0101000>] 
(ret_fast_syscall+0x0/0x54)
[   74.380365] Exception stack(0xede71fa8 to 0xede71ff0)
[   74.385407] 1fa0:                   000c530c 000c52d0 000c530c 
000c52d0 000c52dc 00000000
[   74.393571] 1fc0: 000c530c 000c52d0 000a2a0c 0000000b 000c52dc 
000c4b5c 000c4b5c 000c530c
[   74.401733] 1fe0: b6f25ed4 beef38b8 00042038 b6f25ee0
[   74.406778] Code: e1a04000 f590f000 e3a03001 e34f3fff (e1902f9f)
[   74.412895] ---[ end trace aad10e0b4fcbf193 ]---

I think I will drop this patch until this issue is fixed.

Philipp
Quentin Schulz Sept. 6, 2018, 7:24 a.m. UTC | #3
Hi Philipp,

On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
> Since we have now thermal trotteling enabeled we can now add the full
> range of the OPP table.
> 

That's not the reason why they were not added.

Please see commit 2db639d8c1663d7543c9ab5323383d94c8a76c63[1].

Basically, you only want the OPPs which can work below or at the default
voltage of the CPU supply, because the CPU supply is specific to each
board.

If you set your CPU to work at a given frequency and the voltage isn't
updated (saying opp-microvolt = <x>; in DT isn't enough, you need
cpu-supply to be provided and functional), the CPU might just crash.

Without cpu-supply property, underclocking isn't effective in term of
thermal cooling or power saving. Overclocking is very, very, very likely
to make the CPU crash.

It's not a very difficult thing to do to test if a given frequency work
well but it needs a specific test environment and it's a lengthy test,
you can have a look at those tools here[3] if you like. It's not because
it works in a given test case that'll work on the long term under heavy
load and constant frequency changes.

For A83T, I already did it and the outcome is the patch in [1]. Same for
A33.

So, if you want to use these three higher OPPs, you need to define them
in your board DTS and add the cpu-supply property. See what's done for
the A33 and more specifically the Sinlinx SinA33[2] as an example.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2db639d8c1663d7543c9ab5323383d94c8a76c63
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
[3] http://linux-sunxi.org/Hardware_Reliability_Tests#CPU

Quentin

> The operating points were found in Allwinner BSP and fex files.
> 
> Signed-off-by: Philipp Rossak <embed3d@gmail.com>
> ---
>  arch/arm/boot/dts/sun8i-a83t.dtsi | 32 ++++++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
> index 78aa448e869f..ddcf404f9c80 100644
> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> @@ -250,6 +250,22 @@
>  			opp-microvolt = <840000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
>  		};
> +
> +		opp-1608000000 {
> +			opp-hz = /bits/ 64 <1608000000>;
> +			opp-microvolt = <920000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-1800000000 { /* BOOT FREQ */
> +			opp-hz = /bits/ 64 <1800000000>;
> +			opp-microvolt = <1000000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-2016000000 {
> +			opp-hz = /bits/ 64 <2016000000>;
> +			opp-microvolt = <1080000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
>  	};
>  
>  	cpu1_opp_table: opp_table1 {
> @@ -303,6 +319,22 @@
>  			opp-microvolt = <840000>;
>  			clock-latency-ns = <244144>; /* 8 32k periods */
>  		};
> +
> +		opp-1608000000 {
> +			opp-hz = /bits/ 64 <1608000000>;
> +			opp-microvolt = <920000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-1800000000 { /* BOOT FREQ */
> +			opp-hz = /bits/ 64 <1800000000>;
> +			opp-microvolt = <1000000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
> +		opp-2016000000 {
> +			opp-hz = /bits/ 64 <2016000000>;
> +			opp-microvolt = <1080000>;
> +			clock-latency-ns = <244144>; /* 8 32k periods */
> +		};
>  	};
>  
>  	soc {
> -- 
> 2.11.0
>
Philipp Rossak Sept. 6, 2018, 11:39 a.m. UTC | #4
On 06.09.2018 09:24, Quentin Schulz wrote:
> Hi Philipp,
> 
> On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
>> Since we have now thermal trotteling enabeled we can now add the full
>> range of the OPP table.
>>
> That's not the reason why they were not added.
> 
> Please see commit 2db639d8c1663d7543c9ab5323383d94c8a76c63[1].
> 
> Basically, you only want the OPPs which can work below or at the default
> voltage of the CPU supply, because the CPU supply is specific to each
> board.
> 
> If you set your CPU to work at a given frequency and the voltage isn't
> updated (saying opp-microvolt = <x>; in DT isn't enough, you need
> cpu-supply to be provided and functional), the CPU might just crash.
> 
> Without cpu-supply property, underclocking isn't effective in term of
> thermal cooling or power saving. Overclocking is very, very, very likely
> to make the CPU crash.
> 
> It's not a very difficult thing to do to test if a given frequency work
> well but it needs a specific test environment and it's a lengthy test,
> you can have a look at those tools here[3] if you like. It's not because
> it works in a given test case that'll work on the long term under heavy
> load and constant frequency changes.
> 
> For A83T, I already did it and the outcome is the patch in [1]. Same for
> A33.
> 
> So, if you want to use these three higher OPPs, you need to define them
> in your board DTS and add the cpu-supply property. See what's done for
> the A33 and more specifically the Sinlinx SinA33[2] as an example.
> 
> [1]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2db639d8c1663d7543c9ab5323383d94c8a76c63
> [2]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
> [3]http://linux-sunxi.org/Hardware_Reliability_Tests#CPU
> 
> Quentin
> 

Hey Quentin,

thanks for your feedback!

Sounds like we will never be able to run the A83T on its maximum 
frequency in mainline.

I will do some testing, during the next weeks/months when I have time.
With the old Allwinner kernel I was able to run the A83T with its 
maximum frequency without any problems since my board is very good cooled.

For now I will drop this patch.

Philipp
Maxime Ripard Sept. 6, 2018, 11:42 a.m. UTC | #5
On Thu, Sep 06, 2018 at 01:39:43PM +0200, Philipp Rossak wrote:
> On 06.09.2018 09:24, Quentin Schulz wrote:
> > Hi Philipp,
> > 
> > On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
> > > Since we have now thermal trotteling enabeled we can now add the full
> > > range of the OPP table.
> > > 
> > That's not the reason why they were not added.
> > 
> > Please see commit 2db639d8c1663d7543c9ab5323383d94c8a76c63[1].
> > 
> > Basically, you only want the OPPs which can work below or at the default
> > voltage of the CPU supply, because the CPU supply is specific to each
> > board.
> > 
> > If you set your CPU to work at a given frequency and the voltage isn't
> > updated (saying opp-microvolt = <x>; in DT isn't enough, you need
> > cpu-supply to be provided and functional), the CPU might just crash.
> > 
> > Without cpu-supply property, underclocking isn't effective in term of
> > thermal cooling or power saving. Overclocking is very, very, very likely
> > to make the CPU crash.
> > 
> > It's not a very difficult thing to do to test if a given frequency work
> > well but it needs a specific test environment and it's a lengthy test,
> > you can have a look at those tools here[3] if you like. It's not because
> > it works in a given test case that'll work on the long term under heavy
> > load and constant frequency changes.
> > 
> > For A83T, I already did it and the outcome is the patch in [1]. Same for
> > A33.
> > 
> > So, if you want to use these three higher OPPs, you need to define them
> > in your board DTS and add the cpu-supply property. See what's done for
> > the A33 and more specifically the Sinlinx SinA33[2] as an example.
> > 
> > [1]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2db639d8c1663d7543c9ab5323383d94c8a76c63
> > [2]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
> > [3]http://linux-sunxi.org/Hardware_Reliability_Tests#CPU
> > 
> > Quentin
> > 
> 
> Hey Quentin,
> 
> thanks for your feedback!
> 
> Sounds like we will never be able to run the A83T on its maximum frequency
> in mainline.
> 
> I will do some testing, during the next weeks/months when I have time.
> With the old Allwinner kernel I was able to run the A83T with its maximum
> frequency without any problems since my board is very good cooled.

You definitely can, but I think Quentin's point was to do it on a
per-board basis, not for all of the A83t boards at once.

Maxime
Quentin Schulz Sept. 6, 2018, 12:06 p.m. UTC | #6
Hi Maxime, Philipp,

On Thu, Sep 06, 2018 at 01:42:41PM +0200, Maxime Ripard wrote:
> On Thu, Sep 06, 2018 at 01:39:43PM +0200, Philipp Rossak wrote:
> > On 06.09.2018 09:24, Quentin Schulz wrote:
> > > Hi Philipp,
> > > 
> > > On Thu, Aug 30, 2018 at 05:45:18PM +0200, Philipp Rossak wrote:
> > > > Since we have now thermal trotteling enabeled we can now add the full
> > > > range of the OPP table.
> > > > 
> > > That's not the reason why they were not added.
> > > 
> > > Please see commit 2db639d8c1663d7543c9ab5323383d94c8a76c63[1].
> > > 
> > > Basically, you only want the OPPs which can work below or at the default
> > > voltage of the CPU supply, because the CPU supply is specific to each
> > > board.
> > > 
> > > If you set your CPU to work at a given frequency and the voltage isn't
> > > updated (saying opp-microvolt = <x>; in DT isn't enough, you need
> > > cpu-supply to be provided and functional), the CPU might just crash.
> > > 
> > > Without cpu-supply property, underclocking isn't effective in term of
> > > thermal cooling or power saving. Overclocking is very, very, very likely
> > > to make the CPU crash.
> > > 
> > > It's not a very difficult thing to do to test if a given frequency work
> > > well but it needs a specific test environment and it's a lengthy test,
> > > you can have a look at those tools here[3] if you like. It's not because
> > > it works in a given test case that'll work on the long term under heavy
> > > load and constant frequency changes.
> > > 
> > > For A83T, I already did it and the outcome is the patch in [1]. Same for
> > > A33.
> > > 
> > > So, if you want to use these three higher OPPs, you need to define them
> > > in your board DTS and add the cpu-supply property. See what's done for
> > > the A33 and more specifically the Sinlinx SinA33[2] as an example.
> > > 
> > > [1]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2db639d8c1663d7543c9ab5323383d94c8a76c63
> > > [2]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
> > > [3]http://linux-sunxi.org/Hardware_Reliability_Tests#CPU
> > > 
> > > Quentin
> > > 
> > 
> > Hey Quentin,
> > 
> > thanks for your feedback!
> > 
> > Sounds like we will never be able to run the A83T on its maximum frequency
> > in mainline.
> > 
> > I will do some testing, during the next weeks/months when I have time.
> > With the old Allwinner kernel I was able to run the A83T with its maximum
> > frequency without any problems since my board is very good cooled.
> 
> You definitely can, but I think Quentin's point was to do it on a
> per-board basis, not for all of the A83t boards at once.
> 

Yes, exactly. That's what we did for the Sinlinx SinA33. Just take
inspiration from it.

You can run the CPU at max frequency with the old Allwinner kernel
because it most likely updates the CPU voltage. Let's say overheating is
not an issue, you still need to have a way to overclock AND overvolt to
the values in the OPP you're targetting. Your CPU won't be stable with
just overclocking without overvolting it, trust me, I've been there.

It can even be possible that the Allwinner BSP is only stable in your
use case.

The CPU voltage is specific to every board (cpu-supply property). So we
do not declare the CPU frequencies that require overvolting since we
cannot be sure a board will define the cpu-supply property and thus, be
able to overvolt the CPU.

So, though thermal throttling is an important feature because
overheating the CPU too much will shut it down on the hardware level
(among other consequences), it does not make the higher OPPs magically
work without a valid and working cpu-supply.

The link I gave you is an important piece of software to test the
stability of a system under heavy load and a lot of frequency changes.
It's important to know that because it works for you in your use case
doesn't make it work in any use case. Testing with these pieces of
software helps to cover more hardcore use cases but isn't perfect of
course. That's a start though.

Quentin
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 78aa448e869f..ddcf404f9c80 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -250,6 +250,22 @@ 
 			opp-microvolt = <840000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
+
+		opp-1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <920000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
+		opp-1800000000 { /* BOOT FREQ */
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
+		opp-2016000000 {
+			opp-hz = /bits/ 64 <2016000000>;
+			opp-microvolt = <1080000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
 	};
 
 	cpu1_opp_table: opp_table1 {
@@ -303,6 +319,22 @@ 
 			opp-microvolt = <840000>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
 		};
+
+		opp-1608000000 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <920000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
+		opp-1800000000 { /* BOOT FREQ */
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1000000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
+		opp-2016000000 {
+			opp-hz = /bits/ 64 <2016000000>;
+			opp-microvolt = <1080000>;
+			clock-latency-ns = <244144>; /* 8 32k periods */
+		};
 	};
 
 	soc {