[kvm-unit-tests,PULL,3/5] s390x: fix spelling of "initial"
diff mbox series

Message ID 20180830163022.12350-4-david@redhat.com
State New
Headers show
Series
  • [kvm-unit-tests,PULL,1/5] s390x: user ctl_set/clear_bit for low address protection
Related show

Commit Message

David Hildenbrand Aug. 30, 2018, 4:30 p.m. UTC
Fix this spelling mistake.

Suggested-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
---
 s390x/cstart64.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

David Hildenbrand Sept. 17, 2018, 7:26 a.m. UTC | #1
Am 30.08.18 um 18:30 schrieb David Hildenbrand:
> Fix this spelling mistake.
> 
> Suggested-by: Janosch Frank <frankja@linux.ibm.com>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> Signed-off-by: David Hildenbrand <david@redhat.com>
> ---
>  s390x/cstart64.S | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/s390x/cstart64.S b/s390x/cstart64.S
> index 02a4f77..c38ebc0 100644
> --- a/s390x/cstart64.S
> +++ b/s390x/cstart64.S
> @@ -20,7 +20,7 @@ start:
>  	/* setup stack */
>  	larl	%r15, stackptr
>  	/* setup initial PSW mask + control registers*/
> -	larl	%r1, initital_psw
> +	larl	%r1, initial_psw
>  	lpswe	0(%r1)
>  init_psw_cont:
>  	/* setup pgm interrupt handler */
> @@ -39,7 +39,7 @@ init_psw_cont:
>  	larl	%r1, mcck_int_psw
>  	mvc	GEN_LC_SVC_NEW_PSW(16), 0(%r1)
>  	/* setup cr0, enabling e.g. AFP-register control */
> -	larl	%r1, initital_cr0
> +	larl	%r1, initial_cr0
>  	lctlg	%c0, %c0, 0(%r1)
>  	/* call setup() */
>  	brasl	%r14, setup
> @@ -134,7 +134,7 @@ svc_int:
>  	lpswe	GEN_LC_SVC_OLD_PSW
>  
>  	.align	8
> -initital_psw:
> +initial_psw:
>  	.quad	0x0000000180000000, init_psw_cont
>  pgm_int_psw:
>  	.quad	0x0000000180000000, pgm_int
> @@ -146,6 +146,6 @@ io_int_psw:
>  	.quad	0x0000000180000000, io_int
>  svc_int_psw:
>  	.quad	0x0000000180000000, svc_int
> -initital_cr0:
> +initial_cr0:
>  	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
>  	.quad	0x0000000000040000
> 

Hi Paolo,

looks like you missed this patch.

(will require one fixup due to "[kvm-unit-tests PULL 4/5] s390x:
save/restore cr0 in IRQ handlers")
Paolo Bonzini Sept. 17, 2018, 8:49 a.m. UTC | #2
On 17/09/2018 09:26, David Hildenbrand wrote:
> Am 30.08.18 um 18:30 schrieb David Hildenbrand:
>> Fix this spelling mistake.
>>
>> Suggested-by: Janosch Frank <frankja@linux.ibm.com>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>> Signed-off-by: David Hildenbrand <david@redhat.com>
>> ---
>>  s390x/cstart64.S | 8 ++++----
>>  1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/s390x/cstart64.S b/s390x/cstart64.S
>> index 02a4f77..c38ebc0 100644
>> --- a/s390x/cstart64.S
>> +++ b/s390x/cstart64.S
>> @@ -20,7 +20,7 @@ start:
>>  	/* setup stack */
>>  	larl	%r15, stackptr
>>  	/* setup initial PSW mask + control registers*/
>> -	larl	%r1, initital_psw
>> +	larl	%r1, initial_psw
>>  	lpswe	0(%r1)
>>  init_psw_cont:
>>  	/* setup pgm interrupt handler */
>> @@ -39,7 +39,7 @@ init_psw_cont:
>>  	larl	%r1, mcck_int_psw
>>  	mvc	GEN_LC_SVC_NEW_PSW(16), 0(%r1)
>>  	/* setup cr0, enabling e.g. AFP-register control */
>> -	larl	%r1, initital_cr0
>> +	larl	%r1, initial_cr0
>>  	lctlg	%c0, %c0, 0(%r1)
>>  	/* call setup() */
>>  	brasl	%r14, setup
>> @@ -134,7 +134,7 @@ svc_int:
>>  	lpswe	GEN_LC_SVC_OLD_PSW
>>  
>>  	.align	8
>> -initital_psw:
>> +initial_psw:
>>  	.quad	0x0000000180000000, init_psw_cont
>>  pgm_int_psw:
>>  	.quad	0x0000000180000000, pgm_int
>> @@ -146,6 +146,6 @@ io_int_psw:
>>  	.quad	0x0000000180000000, io_int
>>  svc_int_psw:
>>  	.quad	0x0000000180000000, svc_int
>> -initital_cr0:
>> +initial_cr0:
>>  	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
>>  	.quad	0x0000000000040000
>>
> 
> Hi Paolo,
> 
> looks like you missed this patch.
> 
> (will require one fixup due to "[kvm-unit-tests PULL 4/5] s390x:
> save/restore cr0 in IRQ handlers")
> 

Queued now, thanks.

Paolo

Patch
diff mbox series

diff --git a/s390x/cstart64.S b/s390x/cstart64.S
index 02a4f77..c38ebc0 100644
--- a/s390x/cstart64.S
+++ b/s390x/cstart64.S
@@ -20,7 +20,7 @@  start:
 	/* setup stack */
 	larl	%r15, stackptr
 	/* setup initial PSW mask + control registers*/
-	larl	%r1, initital_psw
+	larl	%r1, initial_psw
 	lpswe	0(%r1)
 init_psw_cont:
 	/* setup pgm interrupt handler */
@@ -39,7 +39,7 @@  init_psw_cont:
 	larl	%r1, mcck_int_psw
 	mvc	GEN_LC_SVC_NEW_PSW(16), 0(%r1)
 	/* setup cr0, enabling e.g. AFP-register control */
-	larl	%r1, initital_cr0
+	larl	%r1, initial_cr0
 	lctlg	%c0, %c0, 0(%r1)
 	/* call setup() */
 	brasl	%r14, setup
@@ -134,7 +134,7 @@  svc_int:
 	lpswe	GEN_LC_SVC_OLD_PSW
 
 	.align	8
-initital_psw:
+initial_psw:
 	.quad	0x0000000180000000, init_psw_cont
 pgm_int_psw:
 	.quad	0x0000000180000000, pgm_int
@@ -146,6 +146,6 @@  io_int_psw:
 	.quad	0x0000000180000000, io_int
 svc_int_psw:
 	.quad	0x0000000180000000, svc_int
-initital_cr0:
+initial_cr0:
 	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
 	.quad	0x0000000000040000