diff mbox series

[RFC,v5,6/8] drm/i915: Enable plane color features

Message ID 1537085731-6355-7-git-send-email-uma.shankar@intel.com (mailing list archive)
State New, archived
Headers show
Series Add Plane Color Properties | expand

Commit Message

Shankar, Uma Sept. 16, 2018, 8:15 a.m. UTC
Enable and initialize plane color features.

v2: Rebase and some cleanup

v3: Updated intel_plane_color_init to call
drm_plane_color_create_prop function, which will
in turn create plane color properties.

v4: Rebase

v5: Rebase

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          |  5 +++++
 drivers/gpu/drm/i915/intel_color.c       | 14 ++++++++++++++
 drivers/gpu/drm/i915/intel_device_info.h |  5 +++++
 drivers/gpu/drm/i915/intel_drv.h         |  9 +++++++++
 4 files changed, 33 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 767615e..8234741 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -455,6 +455,11 @@  struct drm_i915_display_funcs {
 
 	void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);
 	void (*load_luts)(struct drm_crtc_state *crtc_state);
+	/* Add Plane Color callbacks */
+	void (*load_plane_csc_matrix)(const struct drm_plane_state
+				      *plane_state);
+	void (*load_plane_luts)(const struct drm_plane_state
+				*plane_state);
 };
 
 #define CSR_VERSION(major, minor)	((major) << 16 | (minor))
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index c6a7bea..fb8402f 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -642,6 +642,20 @@  int intel_color_check(struct drm_crtc *crtc,
 	return -EINVAL;
 }
 
+void intel_plane_color_init(struct drm_plane *plane)
+{
+	struct drm_i915_private *dev_priv = to_i915(plane->dev);
+
+	drm_plane_color_create_prop(plane->dev, plane);
+
+	/* Enable color management support when we have degamma & gamma LUTs. */
+	if (INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size != 0 &&
+	    INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size != 0)
+		drm_plane_enable_color_mgmt(plane,
+		INTEL_INFO(dev_priv)->plane_color.plane_degamma_lut_size,
+		true, INTEL_INFO(dev_priv)->plane_color.plane_gamma_lut_size);
+}
+
 void intel_color_init(struct drm_crtc *crtc)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 6eecd64..71132ad 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -182,6 +182,11 @@  struct intel_device_info {
 		u16 degamma_lut_size;
 		u16 gamma_lut_size;
 	} color;
+
+	struct plane_color_luts {
+		u16 plane_degamma_lut_size;
+		u16 plane_gamma_lut_size;
+	} plane_color;
 };
 
 struct intel_driver_caps {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f573121..5d442e5 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -536,6 +536,14 @@  struct intel_plane_state {
 	 */
 	int scaler_id;
 
+	/*
+	 * Use reduced/limited/broadcast rbg range, compressing from the full
+	 * range fed into the crtcs.
+	 */
+	bool limited_color_range;
+	/* Gamma mode programmed on the plane */
+	uint32_t gamma_mode;
+
 	struct drm_intel_sprite_colorkey ckey;
 };
 
@@ -2187,6 +2195,7 @@  int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
 int intel_color_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
 void intel_color_set_csc(struct drm_crtc_state *crtc_state);
 void intel_color_load_luts(struct drm_crtc_state *crtc_state);
+void intel_plane_color_init(struct drm_plane *plane);
 
 /* intel_lspcon.c */
 bool lspcon_init(struct intel_digital_port *intel_dig_port);