diff mbox series

[2/2] DT: marvell,mmp2: add more TWSI controllers

Message ID 20180917113947.12626-3-lkundrak@v3.sk (mailing list archive)
State New, archived
Headers show
Series Fix TWSI on MMC2 | expand

Commit Message

Lubomir Rintel Sept. 17, 2018, 11:39 a.m. UTC
I've gotten the base addresses, clocks and interrupts from an rusty and old
out-of-tree driver. I haven't actually checked against the datasheet, since
that one is reserved for the Marvell inner circle.

Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.

Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
---
 arch/arm/boot/dts/mmp2.dtsi | 49 +++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)

Comments

Pavel Machek Nov. 3, 2018, 7:05 p.m. UTC | #1
On Mon 2018-09-17 13:39:47, Lubomir Rintel wrote:
> I've gotten the base addresses, clocks and interrupts from an rusty and old
> out-of-tree driver. I haven't actually checked against the datasheet, since
> that one is reserved for the Marvell inner circle.
> 
> Tested with an accelerometer on TWSI6 on an OLPC XO 1.75 machine.
> 
> Cc: Eric Miao <eric.y.miao@gmail.com>
> Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>

Acked-by: Pavel Machek <pavel@ucw.cz>

> ---
>  arch/arm/boot/dts/mmp2.dtsi | 49 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 49 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
> index 47e5b63339d1..2bd4e94501ce 100644
> --- a/arch/arm/boot/dts/mmp2.dtsi
> +++ b/arch/arm/boot/dts/mmp2.dtsi
> @@ -232,6 +232,55 @@
>  				status = "disabled";
>  			};
>  
> +			twsi3: i2c@d4032000 {
> +				compatible = "mrvl,mmp-twsi";
> +				reg = <0xd4032000 0x1000>;
> +				interrupt-parent = <&intcmux17>;
> +				interrupts = <1>;
> +				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
> +				resets = <&soc_clocks MMP2_CLK_TWSI2>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			twsi4: i2c@d4033000 {
> +				compatible = "mrvl,mmp-twsi";
> +				reg = <0xd4033000 0x1000>;
> +				interrupt-parent = <&intcmux17>;
> +				interrupts = <2>;
> +				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
> +				resets = <&soc_clocks MMP2_CLK_TWSI3>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +
> +			twsi5: i2c@d4033800 {
> +				compatible = "mrvl,mmp-twsi";
> +				reg = <0xd4033800 0x1000>;
> +				interrupt-parent = <&intcmux17>;
> +				interrupts = <3>;
> +				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
> +				resets = <&soc_clocks MMP2_CLK_TWSI4>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
> +			twsi6: i2c@d4034000 {
> +				compatible = "mrvl,mmp-twsi";
> +				reg = <0xd4034000 0x1000>;
> +				interrupt-parent = <&intcmux17>;
> +				interrupts = <4>;
> +				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
> +				resets = <&soc_clocks MMP2_CLK_TWSI5>;
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +				status = "disabled";
> +			};
> +
>  			rtc: rtc@d4010000 {
>  				compatible = "mrvl,mmp-rtc";
>  				reg = <0xd4010000 0x1000>;
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi
index 47e5b63339d1..2bd4e94501ce 100644
--- a/arch/arm/boot/dts/mmp2.dtsi
+++ b/arch/arm/boot/dts/mmp2.dtsi
@@ -232,6 +232,55 @@ 
 				status = "disabled";
 			};
 
+			twsi3: i2c@d4032000 {
+				compatible = "mrvl,mmp-twsi";
+				reg = <0xd4032000 0x1000>;
+				interrupt-parent = <&intcmux17>;
+				interrupts = <1>;
+				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
+				resets = <&soc_clocks MMP2_CLK_TWSI2>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			twsi4: i2c@d4033000 {
+				compatible = "mrvl,mmp-twsi";
+				reg = <0xd4033000 0x1000>;
+				interrupt-parent = <&intcmux17>;
+				interrupts = <2>;
+				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
+				resets = <&soc_clocks MMP2_CLK_TWSI3>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+
+			twsi5: i2c@d4033800 {
+				compatible = "mrvl,mmp-twsi";
+				reg = <0xd4033800 0x1000>;
+				interrupt-parent = <&intcmux17>;
+				interrupts = <3>;
+				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
+				resets = <&soc_clocks MMP2_CLK_TWSI4>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
+			twsi6: i2c@d4034000 {
+				compatible = "mrvl,mmp-twsi";
+				reg = <0xd4034000 0x1000>;
+				interrupt-parent = <&intcmux17>;
+				interrupts = <4>;
+				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
+				resets = <&soc_clocks MMP2_CLK_TWSI5>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				status = "disabled";
+			};
+
 			rtc: rtc@d4010000 {
 				compatible = "mrvl,mmp-rtc";
 				reg = <0xd4010000 0x1000>;