| Message ID | 009bf131-c98e-df15-9c17-fb03c7bb09e2@cogentembedded.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Simon Horman |
| Headers | show |
| Series | arm64: dts: renesas: r8a779{7|8}0: add TPU support | expand |
On 09/19/2018 11:02 PM, Sergei Shtylyov wrote: > Describe TPU in the R8A779{7|8}0 device trees. > > Based on the original (and large) patches by Vladimir Barinov. > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > --- > This patch is against the 'renesas-devel-20180919-v4.19-rc4' branch of > Simon Horman's 'renesas.git' repo. > > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ > arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++ > 2 files changed, 17 insertions(+) > > Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi > =================================================================== > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -614,6 +614,14 @@ > status = "disabled"; > }; > > + tpu: pwm@e6e80000 { > + compatible = "renesas,tpu-r8a77970", "renesas,tpu"; Oops, forgot to document the SoC specific binding... > + reg = <0 0xe6e80000 0 0x100>; > + clocks = <&cpg CPG_MOD 304>; > + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; > + #pwm-cells = <4>; > + status = "disabled"; > + }; > > vin0: video@e6ef0000 { > compatible = "renesas,vin-r8a77970"; > Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > =================================================================== > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi > +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > @@ -666,6 +666,15 @@ > status = "disabled"; > }; > > + tpu: pwm@e6e80000 { > + compatible = "renesas,tpu-r8a7798", "renesas,tpu"; Same here. Plus forgot a zero at the end. :-/ > + reg = <0 0xe6e80000 0 0x100>; > + clocks = <&cpg CPG_MOD 304>; > + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; > + #pwm-cells = <4>; > + status = "disabled"; > + }; > + > vin0: video@e6ef0000 { > compatible = "renesas,vin-r8a77980"; > reg = <0 0xe6ef0000 0 0x1000>; > MBR, Sergei
On Wed, Sep 19, 2018 at 11:21:49PM +0300, Sergei Shtylyov wrote: > On 09/19/2018 11:02 PM, Sergei Shtylyov wrote: > > > Describe TPU in the R8A779{7|8}0 device trees. > > > > Based on the original (and large) patches by Vladimir Barinov. > > > > Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> > > Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> > > > > --- > > This patch is against the 'renesas-devel-20180919-v4.19-rc4' branch of > > Simon Horman's 'renesas.git' repo. > > > > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ > > arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++ > > 2 files changed, 17 insertions(+) > > > > Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi > > =================================================================== > > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi > > +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi > > @@ -614,6 +614,14 @@ > > status = "disabled"; > > }; > > > > + tpu: pwm@e6e80000 { > > + compatible = "renesas,tpu-r8a77970", "renesas,tpu"; > > Oops, forgot to document the SoC specific binding... I'm still not seeing the binding in my inbox. Could you post it or point me to a link to it? > > > + reg = <0 0xe6e80000 0 0x100>; This register range seems a little small. From my reading of the documentation 0x148 would be a more obvious choice. Is the driver only accessing registers in in the 0x100 range for some reason? > > + clocks = <&cpg CPG_MOD 304>; > > + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; > > + #pwm-cells = <4>; > > + status = "disabled"; > > + }; > > > > vin0: video@e6ef0000 { > > compatible = "renesas,vin-r8a77970"; > > Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > > =================================================================== > > --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi > > +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi > > @@ -666,6 +666,15 @@ > > status = "disabled"; > > }; > > > > + tpu: pwm@e6e80000 { > > + compatible = "renesas,tpu-r8a7798", "renesas,tpu"; > > Same here. Plus forgot a zero at the end. :-/ > > > + reg = <0 0xe6e80000 0 0x100>; > > + clocks = <&cpg CPG_MOD 304>; > > + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; > > + #pwm-cells = <4>; > > + status = "disabled"; > > + }; > > + > > vin0: video@e6ef0000 { > > compatible = "renesas,vin-r8a77980"; > > reg = <0 0xe6ef0000 0 0x1000>; > > > > MBR, Sergei >
On 9/21/2018 10:35 AM, Simon Horman wrote: >>> Describe TPU in the R8A779{7|8}0 device trees. >>> >>> Based on the original (and large) patches by Vladimir Barinov. >>> >>> Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> >>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> >>> >>> --- >>> This patch is against the 'renesas-devel-20180919-v4.19-rc4' branch of >>> Simon Horman's 'renesas.git' repo. >>> >>> arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ >>> arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++ >>> 2 files changed, 17 insertions(+) >>> >>> Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi >>> =================================================================== >>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi >>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi >>> @@ -614,6 +614,14 @@ >>> status = "disabled"; >>> }; >>> >>> + tpu: pwm@e6e80000 { >>> + compatible = "renesas,tpu-r8a77970", "renesas,tpu"; >> >> Oops, forgot to document the SoC specific binding... > > I'm still not seeing the binding in my inbox. > Could you post it or point me to a link to it? Because I still haven't posted it. It turned out the bindings doc needs some fixing 1st... :-/ >>> + reg = <0 0xe6e80000 0 0x100>; > > This register range seems a little small. > From my reading of the documentation 0x148 would be a more obvious choice. Yeah, I've noticed that too -- will be fixed in v2. > Is the driver only accessing registers in in the 0x100 range for some > reason? Yes, the registers beyond 0x100 are for the step motor control... [...] MBR, Sergei
Index: renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -614,6 +614,14 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a77970", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x100>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; + #pwm-cells = <4>; + status = "disabled"; + }; vin0: video@e6ef0000 { compatible = "renesas,vin-r8a77970"; Index: renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi =================================================================== --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -666,6 +666,15 @@ status = "disabled"; }; + tpu: pwm@e6e80000 { + compatible = "renesas,tpu-r8a7798", "renesas,tpu"; + reg = <0 0xe6e80000 0 0x100>; + clocks = <&cpg CPG_MOD 304>; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + #pwm-cells = <4>; + status = "disabled"; + }; + vin0: video@e6ef0000 { compatible = "renesas,vin-r8a77980"; reg = <0 0xe6ef0000 0 0x1000>;
Describe TPU in the R8A779{7|8}0 device trees. Based on the original (and large) patches by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> --- This patch is against the 'renesas-devel-20180919-v4.19-rc4' branch of Simon Horman's 'renesas.git' repo. arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++ arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++ 2 files changed, 17 insertions(+)