| Message ID | 20180920145818.32468-5-sean@poorly.run (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Delegated to: | Andy Gross |
| Headers | show |
| Series | drm/msm: dpu: Various cleanup patches | expand |
On 2018-09-20 07:58, Sean Paul wrote: > From: Sean Paul <seanpaul@chromium.org> > > Per chapter 15 of coding-style, removing 'inline' keyword from > functions > that are larger than a typical macro. In a couple of cases I've > simplified the function and kept the inline. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Jeykumar Sankaran <jsanka@codeaurora.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 4 ++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 16 ++----------- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-- > .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 4 ++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 ++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 12 +++------- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 6 ++--- > .../gpu/drm/msm/disp/dpu1/msm_media_info.h | 24 +++++++++---------- > 9 files changed, 30 insertions(+), 48 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > index a8f2dd7a37c7..5ff23f00582b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c > @@ -53,7 +53,7 @@ static inline int _dpu_crtc_get_mixer_width(struct > dpu_crtc_state *cstate, > return mode->hdisplay / cstate->num_mixers; > } > > -static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) > +static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) > { > struct msm_drm_private *priv; > > @@ -70,7 +70,7 @@ static inline struct dpu_kms > *_dpu_crtc_get_kms(struct > drm_crtc *crtc) > return to_dpu_kms(priv->kms); > } > > -static inline int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, > bool > enable) > +static int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool > enable) > { > struct drm_crtc *crtc; > struct msm_drm_private *priv; > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h > b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h > index 3723b4830335..cc18eca8f527 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h > @@ -266,13 +266,7 @@ static inline int dpu_crtc_get_mixer_height(struct > dpu_crtc *dpu_crtc, > */ > static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) > { > - struct dpu_crtc *dpu_crtc; > - > - if (!crtc) > - return -EINVAL; > - > - dpu_crtc = to_dpu_crtc(crtc); > - return atomic_read(&dpu_crtc->frame_pending); > + return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : > -EINVAL; > } > > /** > @@ -329,13 +323,7 @@ enum dpu_intf_mode dpu_crtc_get_intf_mode(struct > drm_crtc *crtc); > static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( > struct drm_crtc *crtc) > { > - struct dpu_crtc_state *cstate = > - crtc ? to_dpu_crtc_state(crtc->state) : NULL; > - > - if (!cstate) > - return NRT_CLIENT; > - > - return RT_CLIENT; > + return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; > } > > /** > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index 1f7f3c2e09c2..79a6c6b7350b 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -1376,7 +1376,7 @@ static void dpu_encoder_off_work(struct > kthread_work > *work) > * phys: Pointer to physical encoder structure > * extra_flush_bits: Additional bit mask to include in flush trigger > */ > -static inline void _dpu_encoder_trigger_flush(struct drm_encoder > *drm_enc, > +static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, > struct dpu_encoder_phys *phys, uint32_t extra_flush_bits) > { > struct dpu_hw_ctl *ctl; > @@ -1419,7 +1419,7 @@ static inline void > _dpu_encoder_trigger_flush(struct > drm_encoder *drm_enc, > * _dpu_encoder_trigger_start - trigger start for a physical encoder > * phys: Pointer to physical encoder structure > */ > -static inline void _dpu_encoder_trigger_start(struct dpu_encoder_phys > *phys) > +static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) > { > if (!phys) { > DPU_ERROR("invalid argument(s)\n"); > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c > index 283a2491f3e3..b3c68c4fcc8e 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c > @@ -110,7 +110,7 @@ static void drm_mode_to_intf_timing_params( > */ > } > > -static inline u32 get_horizontal_total(const struct intf_timing_params > *timing) > +static u32 get_horizontal_total(const struct intf_timing_params > *timing) > { > u32 active = timing->xres; > u32 inactive = > @@ -119,7 +119,7 @@ static inline u32 get_horizontal_total(const struct > intf_timing_params *timing) > return active + inactive; > } > > -static inline u32 get_vertical_total(const struct intf_timing_params > *timing) > +static u32 get_vertical_total(const struct intf_timing_params *timing) > { > u32 active = timing->yres; > u32 inactive = > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > index b394a1818c5d..cd27ba42efab 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c > @@ -114,7 +114,7 @@ static inline u32 > dpu_hw_ctl_get_flush_register(struct > dpu_hw_ctl *ctx) > return DPU_REG_READ(c, CTL_FLUSH); > } > > -static inline uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl > *ctx, > +static uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx, > enum dpu_sspp sspp) > { > uint32_t flushbits = 0; > @@ -169,7 +169,7 @@ static inline uint32_t > dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx, > return flushbits; > } > > -static inline uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl > *ctx, > +static uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx, > enum dpu_lm lm) > { > uint32_t flushbits = 0; > @@ -202,7 +202,7 @@ static inline uint32_t > dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx, > return flushbits; > } > > -static inline int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx, > +static int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx, > u32 *flushbits, enum dpu_intf intf) > { > switch (intf) { > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c > index acb8dc8acaa5..dbe48e006414 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c > @@ -64,16 +64,10 @@ static struct dpu_lm_cfg *_lm_offset(enum dpu_lm > mixer, > static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum > dpu_stage > stage) > { > const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk; > - int rc; > - > - if (stage == DPU_STAGE_BASE) > - rc = -EINVAL; > - else if (stage <= sblk->maxblendstages) > - rc = sblk->blendstage_base[stage - DPU_STAGE_0]; > - else > - rc = -EINVAL; > + if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) > + return sblk->blendstage_base[stage - DPU_STAGE_0]; > > - return rc; > + return -EINVAL; > } > > static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx, > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c > index c25b52a6b219..8745018ffdd6 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c > @@ -141,7 +141,7 @@ > /* traffic shaper clock in Hz */ > #define TS_CLK 19200000 > > -static inline int _sspp_subblk_offset(struct dpu_hw_pipe *ctx, > +static int _sspp_subblk_offset(struct dpu_hw_pipe *ctx, > int s_id, > u32 *idx) > { > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > index 1ce76460d710..2b23b95f4a6f 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c > @@ -140,7 +140,7 @@ static struct dpu_kms *_dpu_plane_get_kms(struct > drm_plane *plane) > * @src_wdith: width of source buffer > * Return: fill level corresponding to the source buffer/format or 0 > if > error > */ > -static inline int _dpu_plane_calc_fill_level(struct drm_plane *plane, > +static int _dpu_plane_calc_fill_level(struct drm_plane *plane, > const struct dpu_format *fmt, u32 src_width) > { > struct dpu_plane *pdpu, *tmp; > @@ -559,7 +559,7 @@ static int _dpu_plane_get_aspace( > return 0; > } > > -static inline void _dpu_plane_set_scanout(struct drm_plane *plane, > +static void _dpu_plane_set_scanout(struct drm_plane *plane, > struct dpu_plane_state *pstate, > struct dpu_hw_pipe_cfg *pipe_cfg, > struct drm_framebuffer *fb) > @@ -671,7 +671,7 @@ static void _dpu_plane_setup_scaler3(struct > dpu_plane > *pdpu, > scale_cfg->enable = 1; > } > > -static inline void _dpu_plane_setup_csc(struct dpu_plane *pdpu) > +static void _dpu_plane_setup_csc(struct dpu_plane *pdpu) > { > static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = { > { > diff --git a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h > b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h > index 1a35dfb4a4e5..75470ee5b18f 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h > @@ -820,7 +820,7 @@ enum color_fmts { > * Progressive: width > * Interlaced: width > */ > -static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) > +static unsigned int VENUS_Y_STRIDE(int color_fmt, int width) > { > unsigned int alignment, stride = 0; > > @@ -862,7 +862,7 @@ static inline unsigned int VENUS_Y_STRIDE(int > color_fmt, int width) > * Progressive: width > * Interlaced: width > */ > -static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) > +static unsigned int VENUS_UV_STRIDE(int color_fmt, int width) > { > unsigned int alignment, stride = 0; > > @@ -904,7 +904,7 @@ static inline unsigned int VENUS_UV_STRIDE(int > color_fmt, int width) > * Progressive: height > * Interlaced: (height+1)>>1 > */ > -static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) > { > unsigned int alignment, sclines = 0; > > @@ -938,7 +938,7 @@ static inline unsigned int VENUS_Y_SCANLINES(int > color_fmt, int height) > * Progressive: height > * Interlaced: (height+1)>>1 > */ > -static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) > { > unsigned int alignment, sclines = 0; > > @@ -974,7 +974,7 @@ static inline unsigned int VENUS_UV_SCANLINES(int > color_fmt, int height) > * Progressive: width > * Interlaced: width > */ > -static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int > width) > +static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) > { > int y_tile_width = 0, y_meta_stride = 0; > > @@ -1007,7 +1007,7 @@ static inline unsigned int > VENUS_Y_META_STRIDE(int > color_fmt, int width) > * Progressive: height > * Interlaced: (height+1)>>1 > */ > -static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) > { > int y_tile_height = 0, y_meta_scanlines = 0; > > @@ -1040,7 +1040,7 @@ static inline unsigned int > VENUS_Y_META_SCANLINES(int color_fmt, int height) > * Progressive: width > * Interlaced: width > */ > -static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int > width) > +static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) > { > int uv_tile_width = 0, uv_meta_stride = 0; > > @@ -1073,7 +1073,7 @@ static inline unsigned int > VENUS_UV_META_STRIDE(int > color_fmt, int width) > * Progressive: height > * Interlaced: (height+1)>>1 > */ > -static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) > { > int uv_tile_height = 0, uv_meta_scanlines = 0; > > @@ -1099,7 +1099,7 @@ static inline unsigned int > VENUS_UV_META_SCANLINES(int color_fmt, int height) > return uv_meta_scanlines; > } > > -static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) > +static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) > { > unsigned int alignment = 0, stride = 0, bpp = 4; > > @@ -1128,7 +1128,7 @@ static inline unsigned int VENUS_RGB_STRIDE(int > color_fmt, int width) > return stride; > } > > -static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) > { > unsigned int alignment = 0, scanlines = 0; > > @@ -1154,7 +1154,7 @@ static inline unsigned int > VENUS_RGB_SCANLINES(int > color_fmt, int height) > return scanlines; > } > > -static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int > width) > +static unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) > { > int rgb_tile_width = 0, rgb_meta_stride = 0; > > @@ -1178,7 +1178,7 @@ static inline unsigned int > VENUS_RGB_META_STRIDE(int > color_fmt, int width) > return rgb_meta_stride; > } > > -static inline unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int > height) > +static unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int > height) > { > int rgb_tile_height = 0, rgb_meta_scanlines = 0;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index a8f2dd7a37c7..5ff23f00582b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -53,7 +53,7 @@ static inline int _dpu_crtc_get_mixer_width(struct dpu_crtc_state *cstate, return mode->hdisplay / cstate->num_mixers; } -static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) +static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) { struct msm_drm_private *priv; @@ -70,7 +70,7 @@ static inline struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) return to_dpu_kms(priv->kms); } -static inline int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool enable) +static int _dpu_crtc_power_enable(struct dpu_crtc *dpu_crtc, bool enable) { struct drm_crtc *crtc; struct msm_drm_private *priv; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 3723b4830335..cc18eca8f527 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h @@ -266,13 +266,7 @@ static inline int dpu_crtc_get_mixer_height(struct dpu_crtc *dpu_crtc, */ static inline int dpu_crtc_frame_pending(struct drm_crtc *crtc) { - struct dpu_crtc *dpu_crtc; - - if (!crtc) - return -EINVAL; - - dpu_crtc = to_dpu_crtc(crtc); - return atomic_read(&dpu_crtc->frame_pending); + return crtc ? atomic_read(&to_dpu_crtc(crtc)->frame_pending) : -EINVAL; } /** @@ -329,13 +323,7 @@ enum dpu_intf_mode dpu_crtc_get_intf_mode(struct drm_crtc *crtc); static inline enum dpu_crtc_client_type dpu_crtc_get_client_type( struct drm_crtc *crtc) { - struct dpu_crtc_state *cstate = - crtc ? to_dpu_crtc_state(crtc->state) : NULL; - - if (!cstate) - return NRT_CLIENT; - - return RT_CLIENT; + return crtc && crtc->state ? RT_CLIENT : NRT_CLIENT; } /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1f7f3c2e09c2..79a6c6b7350b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -1376,7 +1376,7 @@ static void dpu_encoder_off_work(struct kthread_work *work) * phys: Pointer to physical encoder structure * extra_flush_bits: Additional bit mask to include in flush trigger */ -static inline void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, +static void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, struct dpu_encoder_phys *phys, uint32_t extra_flush_bits) { struct dpu_hw_ctl *ctl; @@ -1419,7 +1419,7 @@ static inline void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc, * _dpu_encoder_trigger_start - trigger start for a physical encoder * phys: Pointer to physical encoder structure */ -static inline void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) +static void _dpu_encoder_trigger_start(struct dpu_encoder_phys *phys) { if (!phys) { DPU_ERROR("invalid argument(s)\n"); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index 283a2491f3e3..b3c68c4fcc8e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -110,7 +110,7 @@ static void drm_mode_to_intf_timing_params( */ } -static inline u32 get_horizontal_total(const struct intf_timing_params *timing) +static u32 get_horizontal_total(const struct intf_timing_params *timing) { u32 active = timing->xres; u32 inactive = @@ -119,7 +119,7 @@ static inline u32 get_horizontal_total(const struct intf_timing_params *timing) return active + inactive; } -static inline u32 get_vertical_total(const struct intf_timing_params *timing) +static u32 get_vertical_total(const struct intf_timing_params *timing) { u32 active = timing->yres; u32 inactive = diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index b394a1818c5d..cd27ba42efab 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -114,7 +114,7 @@ static inline u32 dpu_hw_ctl_get_flush_register(struct dpu_hw_ctl *ctx) return DPU_REG_READ(c, CTL_FLUSH); } -static inline uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx, +static uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx, enum dpu_sspp sspp) { uint32_t flushbits = 0; @@ -169,7 +169,7 @@ static inline uint32_t dpu_hw_ctl_get_bitmask_sspp(struct dpu_hw_ctl *ctx, return flushbits; } -static inline uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx, +static uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx, enum dpu_lm lm) { uint32_t flushbits = 0; @@ -202,7 +202,7 @@ static inline uint32_t dpu_hw_ctl_get_bitmask_mixer(struct dpu_hw_ctl *ctx, return flushbits; } -static inline int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx, +static int dpu_hw_ctl_get_bitmask_intf(struct dpu_hw_ctl *ctx, u32 *flushbits, enum dpu_intf intf) { switch (intf) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c index acb8dc8acaa5..dbe48e006414 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c @@ -64,16 +64,10 @@ static struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer, static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) { const struct dpu_lm_sub_blks *sblk = ctx->cap->sblk; - int rc; - - if (stage == DPU_STAGE_BASE) - rc = -EINVAL; - else if (stage <= sblk->maxblendstages) - rc = sblk->blendstage_base[stage - DPU_STAGE_0]; - else - rc = -EINVAL; + if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) + return sblk->blendstage_base[stage - DPU_STAGE_0]; - return rc; + return -EINVAL; } static void dpu_hw_lm_setup_out(struct dpu_hw_mixer *ctx, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index c25b52a6b219..8745018ffdd6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -141,7 +141,7 @@ /* traffic shaper clock in Hz */ #define TS_CLK 19200000 -static inline int _sspp_subblk_offset(struct dpu_hw_pipe *ctx, +static int _sspp_subblk_offset(struct dpu_hw_pipe *ctx, int s_id, u32 *idx) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 1ce76460d710..2b23b95f4a6f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -140,7 +140,7 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) * @src_wdith: width of source buffer * Return: fill level corresponding to the source buffer/format or 0 if error */ -static inline int _dpu_plane_calc_fill_level(struct drm_plane *plane, +static int _dpu_plane_calc_fill_level(struct drm_plane *plane, const struct dpu_format *fmt, u32 src_width) { struct dpu_plane *pdpu, *tmp; @@ -559,7 +559,7 @@ static int _dpu_plane_get_aspace( return 0; } -static inline void _dpu_plane_set_scanout(struct drm_plane *plane, +static void _dpu_plane_set_scanout(struct drm_plane *plane, struct dpu_plane_state *pstate, struct dpu_hw_pipe_cfg *pipe_cfg, struct drm_framebuffer *fb) @@ -671,7 +671,7 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu, scale_cfg->enable = 1; } -static inline void _dpu_plane_setup_csc(struct dpu_plane *pdpu) +static void _dpu_plane_setup_csc(struct dpu_plane *pdpu) { static const struct dpu_csc_cfg dpu_csc_YUV2RGB_601L = { { diff --git a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h index 1a35dfb4a4e5..75470ee5b18f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h +++ b/drivers/gpu/drm/msm/disp/dpu1/msm_media_info.h @@ -820,7 +820,7 @@ enum color_fmts { * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) +static unsigned int VENUS_Y_STRIDE(int color_fmt, int width) { unsigned int alignment, stride = 0; @@ -862,7 +862,7 @@ static inline unsigned int VENUS_Y_STRIDE(int color_fmt, int width) * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) +static unsigned int VENUS_UV_STRIDE(int color_fmt, int width) { unsigned int alignment, stride = 0; @@ -904,7 +904,7 @@ static inline unsigned int VENUS_UV_STRIDE(int color_fmt, int width) * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) { unsigned int alignment, sclines = 0; @@ -938,7 +938,7 @@ static inline unsigned int VENUS_Y_SCANLINES(int color_fmt, int height) * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) { unsigned int alignment, sclines = 0; @@ -974,7 +974,7 @@ static inline unsigned int VENUS_UV_SCANLINES(int color_fmt, int height) * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) +static unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) { int y_tile_width = 0, y_meta_stride = 0; @@ -1007,7 +1007,7 @@ static inline unsigned int VENUS_Y_META_STRIDE(int color_fmt, int width) * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) { int y_tile_height = 0, y_meta_scanlines = 0; @@ -1040,7 +1040,7 @@ static inline unsigned int VENUS_Y_META_SCANLINES(int color_fmt, int height) * Progressive: width * Interlaced: width */ -static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) +static unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) { int uv_tile_width = 0, uv_meta_stride = 0; @@ -1073,7 +1073,7 @@ static inline unsigned int VENUS_UV_META_STRIDE(int color_fmt, int width) * Progressive: height * Interlaced: (height+1)>>1 */ -static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) { int uv_tile_height = 0, uv_meta_scanlines = 0; @@ -1099,7 +1099,7 @@ static inline unsigned int VENUS_UV_META_SCANLINES(int color_fmt, int height) return uv_meta_scanlines; } -static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) +static unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) { unsigned int alignment = 0, stride = 0, bpp = 4; @@ -1128,7 +1128,7 @@ static inline unsigned int VENUS_RGB_STRIDE(int color_fmt, int width) return stride; } -static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) { unsigned int alignment = 0, scanlines = 0; @@ -1154,7 +1154,7 @@ static inline unsigned int VENUS_RGB_SCANLINES(int color_fmt, int height) return scanlines; } -static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) +static unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) { int rgb_tile_width = 0, rgb_meta_stride = 0; @@ -1178,7 +1178,7 @@ static inline unsigned int VENUS_RGB_META_STRIDE(int color_fmt, int width) return rgb_meta_stride; } -static inline unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height) +static unsigned int VENUS_RGB_META_SCANLINES(int color_fmt, int height) { int rgb_tile_height = 0, rgb_meta_scanlines = 0;