diff mbox series

[6/7] drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7

Message ID 20180928164738.9756-6-radhakrishna.sripada@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915/icl: Add WaEnable32PlaneMode | expand

Commit Message

Sripada, Radhakrishna Sept. 28, 2018, 4:47 p.m. UTC 
From: Oscar Mateo <oscar.mateo@intel.com>

Required to dinamically set 'Trilinear Filter Quality Mode'

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
 drivers/gpu/drm/i915/intel_workarounds.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index ffddb3b769d5..54a63c9b694f 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -1018,6 +1018,9 @@  static void icl_whitelist_build(struct whitelist *w)
 
 	/* WaAllowUMDToModifyHalfSliceChicken2:icl */
 	whitelist_reg(w, HALF_SLICE_CHICKEN2);
+
+	/* WaAllowUMDToModifyHalfSliceChicken7:icl */
+	whitelist_reg(w, GEN9_HALF_SLICE_CHICKEN7);
 }
 
 static struct whitelist *whitelist_build(struct intel_engine_cs *engine,