diff mbox series

[3/8] drm/i915/icl: Refactor get_ddi_pll using helper func

Message ID 20181003072203.12848-4-mahesh1.kumar@intel.com (mailing list archive)
State New, archived
Headers show
Series Refactor and Add helper function for combophy/tc ports | expand

Commit Message

Kumar, Mahesh Oct. 3, 2018, 7:21 a.m. UTC 
From: Vandita Kulkarni <vandita.kulkarni@intel.com>

Use the existing port-to-id helper function, to refactor
hence making it scalable.

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c  | 8 +-------
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
 drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 +
 3 files changed, 3 insertions(+), 8 deletions(-)

Comments

Lucas De Marchi Oct. 4, 2018, 9:18 p.m. UTC | #1 
On Wed, Oct 03, 2018 at 12:51:58PM +0530, Mahesh Kumar wrote:
> From: Vandita Kulkarni <vandita.kulkarni@intel.com>
> 
> Use the existing port-to-id helper function, to refactor
> hence making it scalable.
> 
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Madhav Chauhan <madhav.chauhan@intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>


Lucas De Marchi

> ---
>  drivers/gpu/drm/i915/intel_display.c  | 8 +-------
>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 2 +-
>  drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 +
>  3 files changed, 3 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 916eb71e78ed..16d9a20a420a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9307,16 +9307,10 @@ static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv,
>  			return;
>  		break;
>  	case PORT_C:
> -		id = DPLL_ID_ICL_MGPLL1;
> -		break;
>  	case PORT_D:
> -		id = DPLL_ID_ICL_MGPLL2;
> -		break;
>  	case PORT_E:
> -		id = DPLL_ID_ICL_MGPLL3;
> -		break;
>  	case PORT_F:
> -		id = DPLL_ID_ICL_MGPLL4;
> +		id = icl_port_to_mg_pll_id(port);
>  		break;
>  	default:
>  		MISSING_CASE(port);
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index e6cac9225536..510ea90f6f5b 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2628,7 +2628,7 @@ static enum port icl_mg_pll_id_to_port(enum intel_dpll_id id)
>  	return id - DPLL_ID_ICL_MGPLL1 + PORT_C;
>  }
>  
> -static enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
> +enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
>  {
>  	return port - PORT_C + DPLL_ID_ICL_MGPLL1;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> index bf0de8a4dc63..5305ce1c2175 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> @@ -345,5 +345,6 @@ void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv,
>  int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
>  			       uint32_t pll_id);
>  int cnl_hdmi_pll_ref_clock(struct drm_i915_private *dev_priv);
> +enum intel_dpll_id icl_port_to_mg_pll_id(enum port port);
>  
>  #endif /* _INTEL_DPLL_MGR_H_ */
> -- 
> 2.16.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 916eb71e78ed..16d9a20a420a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9307,16 +9307,10 @@  static void icelake_get_ddi_pll(struct drm_i915_private *dev_priv,
 			return;
 		break;
 	case PORT_C:
-		id = DPLL_ID_ICL_MGPLL1;
-		break;
 	case PORT_D:
-		id = DPLL_ID_ICL_MGPLL2;
-		break;
 	case PORT_E:
-		id = DPLL_ID_ICL_MGPLL3;
-		break;
 	case PORT_F:
-		id = DPLL_ID_ICL_MGPLL4;
+		id = icl_port_to_mg_pll_id(port);
 		break;
 	default:
 		MISSING_CASE(port);
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index e6cac9225536..510ea90f6f5b 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2628,7 +2628,7 @@  static enum port icl_mg_pll_id_to_port(enum intel_dpll_id id)
 	return id - DPLL_ID_ICL_MGPLL1 + PORT_C;
 }
 
-static enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
+enum intel_dpll_id icl_port_to_mg_pll_id(enum port port)
 {
 	return port - PORT_C + DPLL_ID_ICL_MGPLL1;
 }
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index bf0de8a4dc63..5305ce1c2175 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -345,5 +345,6 @@  void intel_dpll_dump_hw_state(struct drm_i915_private *dev_priv,
 int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
 			       uint32_t pll_id);
 int cnl_hdmi_pll_ref_clock(struct drm_i915_private *dev_priv);
+enum intel_dpll_id icl_port_to_mg_pll_id(enum port port);
 
 #endif /* _INTEL_DPLL_MGR_H_ */