| Message ID | 20181004182939.7668-1-radhakrishna.sripada@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/6] drm/i915/icl: Add WaEnable32PlaneMode | expand |
>-----Original Message----- >From: Sripada, Radhakrishna >Sent: Thursday, October 4, 2018 11:30 AM >To: intel-gfx@lists.freedesktop.org >Cc: Sripada, Radhakrishna <radhakrishna.sripada@intel.com>; Chris Wilson ><chris@chris-wilson.co.uk>; Thierry, Michel <michel.thierry@intel.com>; Ausmus, >James <james.ausmus@intel.com>; Srivatsa, Anusha ><anusha.srivatsa@intel.com> >Subject: [PATCH v2 1/6] drm/i915/icl: Add WaEnable32PlaneMode > >Gen11 Display suports 32 planes in total. Enable the new format in context status >to be used and expanded to 32 planes. > >V2: Move the WA to display WA's(Chris) > >Cc: Chris Wilson <chris@chris-wilson.co.uk> >Cc: Michel Thierry <michel.thierry@intel.com> >Cc: James Ausmus <james.ausmus@intel.com> >Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> >Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >--- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 5 insertions(+) > >diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h >index a71c507cfb9b..4fb8e9eef312 100644 >--- a/drivers/gpu/drm/i915/i915_reg.h >+++ b/drivers/gpu/drm/i915/i915_reg.h >@@ -2573,6 +2573,7 @@ enum i915_power_well_id { > /* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */ #define >GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4) > #define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2) >+#define GEN11_ENABLE_32_PLANE_MODE (1 << 7) > > /* WaClearTdlStateAckDirtyBits */ > #define GEN8_STATE_ACK _MMIO(0x20F0) >diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >index 1392aa56a55a..d4a464246760 100644 >--- a/drivers/gpu/drm/i915/intel_pm.c >+++ b/drivers/gpu/drm/i915/intel_pm.c >@@ -8734,6 +8734,10 @@ static void icl_init_clock_gating(struct >drm_i915_private *dev_priv) > /* This is not an Wa. Enable to reduce Sampler power */ > I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN, > I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & >~DFR_DISABLE); >+ >+ /* WaEnable32PlaneMode:icl */ >+ I915_WRITE(GEN9_CSFE_CHICKEN1_RCS, >+ _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE)); > } > > static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) >-- >2.9.3
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a71c507cfb9b..4fb8e9eef312 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2573,6 +2573,7 @@ enum i915_power_well_id { /* chicken reg for WaConextSwitchWithConcurrentTLBInvalidate */ #define GEN9_CSFE_CHICKEN1_RCS _MMIO(0x20D4) #define GEN9_PREEMPT_GPGPU_SYNC_SWITCH_DISABLE (1 << 2) +#define GEN11_ENABLE_32_PLANE_MODE (1 << 7) /* WaClearTdlStateAckDirtyBits */ #define GEN8_STATE_ACK _MMIO(0x20F0) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 1392aa56a55a..d4a464246760 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8734,6 +8734,10 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv) /* This is not an Wa. Enable to reduce Sampler power */ I915_WRITE(GEN10_DFR_RATIO_EN_AND_CHICKEN, I915_READ(GEN10_DFR_RATIO_EN_AND_CHICKEN) & ~DFR_DISABLE); + + /* WaEnable32PlaneMode:icl */ + I915_WRITE(GEN9_CSFE_CHICKEN1_RCS, + _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE)); } static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
Gen11 Display suports 32 planes in total. Enable the new format in context status to be used and expanded to 32 planes. V2: Move the WA to display WA's(Chris) Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Michel Thierry <michel.thierry@intel.com> Cc: James Ausmus <james.ausmus@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 2 files changed, 5 insertions(+)