| Message ID | 20181004231600.14101-6-paulo.r.zanoni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Watermarks small fixes/improvements | expand |
On Thu, Oct 04, 2018 at 04:15:59PM -0700, Paulo Zanoni wrote: > We were writing to PLANE_BUF_CFG(pipe, plane_id) twice for every > platform, and we were even using different values on the gen10- planar > case. The first write is useless since it just gets replaced with the > next one, so kill it. > > There's a lot to improve in the DDB code, but let's start by avoiding > the double write. > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Looks like leftover code that was intended for removal in commit b879d58ff31ba ("drm/i915/skl+: refactor WM calculation for NV12"). Reviewed-by: Matt Roper <matthew.d.roper@intel.com> One other comment below. > --- > drivers/gpu/drm/i915/intel_pm.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 14f13a371989..53b4a9a2de69 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -5040,8 +5040,6 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc, > skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id), > &wm->trans_wm); > > - skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id), > - &ddb->plane[pipe][plane_id]); > /* FIXME: add proper NV12 support for ICL. */ > if (INTEL_GEN(dev_priv) >= 11) > return skl_ddb_entry_write(dev_priv, Neither this function nor skl_ddb_entry_write() have return values, so I'm surprised this doesn't raise a compiler warning. Maybe while we're touching this area of the code we should drop the 'return' here and convert the next 'if' to an 'else if.' Matt > -- > 2.14.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 14f13a371989..53b4a9a2de69 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5040,8 +5040,6 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc, skl_write_wm_level(dev_priv, PLANE_WM_TRANS(pipe, plane_id), &wm->trans_wm); - skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id), - &ddb->plane[pipe][plane_id]); /* FIXME: add proper NV12 support for ICL. */ if (INTEL_GEN(dev_priv) >= 11) return skl_ddb_entry_write(dev_priv,
We were writing to PLANE_BUF_CFG(pipe, plane_id) twice for every platform, and we were even using different values on the gen10- planar case. The first write is useless since it just gets replaced with the next one, so kill it. There's a lot to improve in the DDB code, but let's start by avoiding the double write. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> --- drivers/gpu/drm/i915/intel_pm.c | 2 -- 1 file changed, 2 deletions(-)