diff mbox series

[v7,3/6] arm64: dts: rockchip: add VPU device node for RK3399

Message ID 20181005001226.12789-4-ezequiel@collabora.com (mailing list archive)
State New, archived
Headers show
Series Add Rockchip VPU JPEG encoder | expand

Commit Message

Ezequiel Garcia Oct. 5, 2018, 12:12 a.m. UTC
Add the Video Processing Unit node for the RK3399 SoC.

Also, fix the VPU IOMMU node, which was disabled and lacking
its power domain property.

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

Comments

Heiko Stübner Oct. 5, 2018, 12:04 p.m. UTC | #1
Am Freitag, 5. Oktober 2018, 02:12:23 CEST schrieb Ezequiel Garcia:
> Add the Video Processing Unit node for the RK3399 SoC.
> 
> Also, fix the VPU IOMMU node, which was disabled and lacking
> its power domain property.
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>

applied for 4.20 (may possibly move to 4.21 though)
after moving power-domain* below (#)iommu* to keep
alphabetical sorting.

Thanks
Heiko
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index c88e603396f6..5efb124e5c3a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1198,6 +1198,18 @@ 
 		status = "disabled";
 	};
 
+	vpu: video-codec@ff650000 {
+		compatible = "rockchip,rk3399-vpu";
+		reg = <0x0 0xff650000 0x0 0x800>;
+		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "vepu", "vdpu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "hclk";
+		power-domains = <&power RK3399_PD_VCODEC>;
+		iommus = <&vpu_mmu>;
+	};
+
 	vpu_mmu: iommu@ff650800 {
 		compatible = "rockchip,iommu";
 		reg = <0x0 0xff650800 0x0 0x40>;
@@ -1205,8 +1217,8 @@ 
 		interrupt-names = "vpu_mmu";
 		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
 		clock-names = "aclk", "iface";
+		power-domains = <&power RK3399_PD_VCODEC>;
 		#iommu-cells = <0>;
-		status = "disabled";
 	};
 
 	vdec_mmu: iommu@ff660480 {