@@ -1231,6 +1231,7 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
{
u32 data;
int ret;
+ struct intel_gvt_irq_ops *ops = vgpu->gvt->irq.ops;
write_vreg(vgpu, offset, p_data, bytes);
data = vgpu_vreg(vgpu, offset);
@@ -1257,6 +1258,9 @@ static int pvinfo_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
vgpu->shared_page_gpa = vgpu_vreg64_t(vgpu,
vgtif_reg(shared_page_gpa));
break;
+ case _vgtif_reg(check_pending_irq):
+ ops->check_pending_irq(vgpu);
+ break;
/* add xhot and yhot to handled list to avoid error log */
case _vgtif_reg(cursor_x_hot):
case _vgtif_reg(cursor_y_hot):
@@ -465,10 +465,19 @@ static void gen8_check_pending_irq(struct intel_vgpu *vgpu)
{
struct intel_gvt_irq *irq = &vgpu->gvt->irq;
int i;
-
- if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) &
- GEN8_MASTER_IRQ_CONTROL))
- return;
+ u32 offset;
+ u32 disable_irq;
+
+ if (VGPU_PVMMIO(vgpu) & PVMMIO_MASTER_IRQ) {
+ offset = offsetof(struct gvt_shared_page, disable_irq);
+ intel_gvt_read_shared_page(vgpu, offset, &disable_irq, 4);
+ if (disable_irq)
+ return;
+ } else {
+ if (!(vgpu_vreg(vgpu, i915_mmio_reg_offset(GEN8_MASTER_IRQ)) &
+ GEN8_MASTER_IRQ_CONTROL))
+ return;
+ }
for_each_set_bit(i, irq->irq_info_bitmap, INTEL_GVT_IRQ_INFO_MAX) {
struct intel_gvt_irq_info *info = irq->info[i];
GVTg to check master irq status in the shared_page instead of register. v1: rebase v0: RFC Signed-off-by: Xiaolin Zhang <xiaolin.zhang@intel.com> --- drivers/gpu/drm/i915/gvt/handlers.c | 4 ++++ drivers/gpu/drm/i915/gvt/interrupt.c | 17 +++++++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-)