| Message ID | 20181015110104.21483-3-yinbo.zhu@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1] mmc: sdhci-of-esdhc: temporary fixup for eMMC HS400 issue | expand |
On Mon, Oct 15, 2018 at 6:05 AM Yinbo Zhu <yinbo.zhu@nxp.com> wrote: > > From: Yangbo Lu <yangbo.lu@nxp.com> > > Currently only LX2160A eSDHC supports eMMC HS400. According to > a large number of tests, eMMC HS400 failed to work at 150MHz, > and for a few boards failed to work at 175MHz. But eMMC HS400 > worked fine on 200MHz. We hadn't found the root cause but > setting eSDHC_DLLCFG0[DLL_FREQ_SEL] = 0 using slow delay chain > seemed to resovle this issue. Let's use this as fixup for now. > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> > --- > drivers/mmc/host/sdhci-of-esdhc.c | 4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c > index dea6611..cbef69c 100644 > --- a/drivers/mmc/host/sdhci-of-esdhc.c > +++ b/drivers/mmc/host/sdhci-of-esdhc.c > @@ -563,7 +563,9 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) > esdhc_clock_enable(host, true); > > temp = sdhci_readl(host, ESDHC_DLLCFG0); > - temp |= ESDHC_DLL_ENABLE | ESDHC_DLL_FREQ_SEL; > + temp |= ESDHC_DLL_ENABLE; > + if (host->mmc->actual_clock == MMC_HS200_MAX_DTR) > + temp |= ESDHC_DLL_FREQ_SEL; If this only applies to LX2160a as you mentioned in the commit message, why your change here doesn't judge if it is LX2160a? > sdhci_writel(host, temp, ESDHC_DLLCFG0); > temp = sdhci_readl(host, ESDHC_TBCTL); > sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL); > -- > 1.7.1 >
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index dea6611..cbef69c 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c @@ -563,7 +563,9 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock) esdhc_clock_enable(host, true); temp = sdhci_readl(host, ESDHC_DLLCFG0); - temp |= ESDHC_DLL_ENABLE | ESDHC_DLL_FREQ_SEL; + temp |= ESDHC_DLL_ENABLE; + if (host->mmc->actual_clock == MMC_HS200_MAX_DTR) + temp |= ESDHC_DLL_FREQ_SEL; sdhci_writel(host, temp, ESDHC_DLLCFG0); temp = sdhci_readl(host, ESDHC_TBCTL); sdhci_writel(host, temp | ESDHC_HS400_WNDW_ADJUST, ESDHC_TBCTL);