| Message ID | 20181018104106.30147-1-tvrtko.ursulin@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/icl: Store available engine masks in INTEL_INFO | expand |
On 18/10/18 03:41, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > > Upcoming GuC code will need to read the fused off engine masks as well, > and will also want to have them as enabled instead of disabled masks. > > To consolidate the read-out place we can store them in this fashion inside > INTEL_INFO so they can be easily referenced in the future. > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> The GuC patch that re-reads the fuse register is here: https://patchwork.freedesktop.org/patch/246427/ Consolidations wins: Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Daniele > --- > drivers/gpu/drm/i915/intel_device_info.c | 33 +++++++++++------------- > drivers/gpu/drm/i915/intel_device_info.h | 4 +++ > 2 files changed, 19 insertions(+), 18 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c > index 03df4e33763d..4ed86025e3c9 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -876,40 +876,37 @@ void intel_driver_caps_print(const struct intel_driver_caps *caps, > void intel_device_info_init_mmio(struct drm_i915_private *dev_priv) > { > struct intel_device_info *info = mkwrite_device_info(dev_priv); > - u8 vdbox_disable, vebox_disable; > u32 media_fuse; > - int i; > + unsigned int i; > > if (INTEL_GEN(dev_priv) < 11) > return; > > - media_fuse = I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); > + media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); > > - vdbox_disable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; > - vebox_disable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> > - GEN11_GT_VEBOX_DISABLE_SHIFT; > + info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; > + info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> > + GEN11_GT_VEBOX_DISABLE_SHIFT; > > - DRM_DEBUG_DRIVER("vdbox disable: %04x\n", vdbox_disable); > + DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable); > for (i = 0; i < I915_MAX_VCS; i++) { > if (!HAS_ENGINE(dev_priv, _VCS(i))) > continue; > > - if (!(BIT(i) & vdbox_disable)) > - continue; > - > - info->ring_mask &= ~ENGINE_MASK(_VCS(i)); > - DRM_DEBUG_DRIVER("vcs%u fused off\n", i); > + if (!(BIT(i) & info->vdbox_enable)) { > + info->ring_mask &= ~ENGINE_MASK(_VCS(i)); > + DRM_DEBUG_DRIVER("vcs%u fused off\n", i); > + } > } > > - DRM_DEBUG_DRIVER("vebox disable: %04x\n", vebox_disable); > + DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable); > for (i = 0; i < I915_MAX_VECS; i++) { > if (!HAS_ENGINE(dev_priv, _VECS(i))) > continue; > > - if (!(BIT(i) & vebox_disable)) > - continue; > - > - info->ring_mask &= ~ENGINE_MASK(_VECS(i)); > - DRM_DEBUG_DRIVER("vecs%u fused off\n", i); > + if (!(BIT(i) & info->vebox_enable)) { > + info->ring_mask &= ~ENGINE_MASK(_VECS(i)); > + DRM_DEBUG_DRIVER("vecs%u fused off\n", i); > + } > } > } > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h > index af7002640cdf..b4c2c4eae78b 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -185,6 +185,10 @@ struct intel_device_info { > > u32 cs_timestamp_frequency_khz; > > + /* Enabled (not fused off) media engine bitmasks. */ > + u8 vdbox_enable; > + u8 vebox_enable; > + > struct color_luts { > u16 degamma_lut_size; > u16 gamma_lut_size; >
On 18/10/2018 12:11, Patchwork wrote: > == Series Details == > > Series: drm/i915/icl: Store available engine masks in INTEL_INFO > URL : https://patchwork.freedesktop.org/series/51175/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5005 -> Patchwork_10502 = > > == Summary - SUCCESS == > > No regressions found. > > External URL: https://patchwork.freedesktop.org/api/1.0/series/51175/revisions/1/mbox/ > > == Known issues == > > Here are the changes found in Patchwork_10502 that come from known issues: > > === IGT changes === > > ==== Issues hit ==== > > igt@drv_module_reload@basic-reload: > fi-blb-e6850: PASS -> INCOMPLETE (fdo#107718) > > igt@gem_exec_suspend@basic-s3: > fi-bdw-samus: NOTRUN -> INCOMPLETE (fdo#107773) > fi-kbl-soraka: NOTRUN -> INCOMPLETE (fdo#107774, fdo#107859, fdo#107556) > > igt@kms_chamelium@hdmi-edid-read: > fi-icl-u2: NOTRUN -> DMESG-WARN (fdo#107732, fdo#108070) > > igt@kms_chamelium@hdmi-hpd-fast: > fi-icl-u2: NOTRUN -> DMESG-WARN (fdo#107732) > > igt@kms_frontbuffer_tracking@basic: > fi-hsw-peppy: PASS -> DMESG-WARN (fdo#102614) > fi-byt-clapper: PASS -> FAIL (fdo#103167) > > > fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 > fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 > fdo#107556 https://bugs.freedesktop.org/show_bug.cgi?id=107556 > fdo#107718 https://bugs.freedesktop.org/show_bug.cgi?id=107718 > fdo#107732 https://bugs.freedesktop.org/show_bug.cgi?id=107732 > fdo#107773 https://bugs.freedesktop.org/show_bug.cgi?id=107773 > fdo#107774 https://bugs.freedesktop.org/show_bug.cgi?id=107774 > fdo#107859 https://bugs.freedesktop.org/show_bug.cgi?id=107859 > fdo#108070 https://bugs.freedesktop.org/show_bug.cgi?id=108070 > > > == Participating hosts (42 -> 42) == > > Additional (3): fi-kbl-soraka fi-icl-u2 fi-bdw-samus > Missing (3): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan > > > == Build changes == > > * Linux: CI_DRM_5005 -> Patchwork_10502 > > CI_DRM_5005: 7a27ee6b5f714f6852abb0098990a05675bd9d55 @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_4683: 7766b1e2348b32cc8ed58a972c6fd53b20279549 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_10502: 2316d11688a081d93c20a7065bb96f463b316a01 @ git://anongit.freedesktop.org/gfx-ci/linux > > > == Linux commits == > > 2316d11688a0 drm/i915/icl: Store available engine masks in INTEL_INFO Pushed, thanks for the review! Regards, Tvrtko
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 03df4e33763d..4ed86025e3c9 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -876,40 +876,37 @@ void intel_driver_caps_print(const struct intel_driver_caps *caps, void intel_device_info_init_mmio(struct drm_i915_private *dev_priv) { struct intel_device_info *info = mkwrite_device_info(dev_priv); - u8 vdbox_disable, vebox_disable; u32 media_fuse; - int i; + unsigned int i; if (INTEL_GEN(dev_priv) < 11) return; - media_fuse = I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); + media_fuse = ~I915_READ(GEN11_GT_VEBOX_VDBOX_DISABLE); - vdbox_disable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; - vebox_disable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> - GEN11_GT_VEBOX_DISABLE_SHIFT; + info->vdbox_enable = media_fuse & GEN11_GT_VDBOX_DISABLE_MASK; + info->vebox_enable = (media_fuse & GEN11_GT_VEBOX_DISABLE_MASK) >> + GEN11_GT_VEBOX_DISABLE_SHIFT; - DRM_DEBUG_DRIVER("vdbox disable: %04x\n", vdbox_disable); + DRM_DEBUG_DRIVER("vdbox enable: %04x\n", info->vdbox_enable); for (i = 0; i < I915_MAX_VCS; i++) { if (!HAS_ENGINE(dev_priv, _VCS(i))) continue; - if (!(BIT(i) & vdbox_disable)) - continue; - - info->ring_mask &= ~ENGINE_MASK(_VCS(i)); - DRM_DEBUG_DRIVER("vcs%u fused off\n", i); + if (!(BIT(i) & info->vdbox_enable)) { + info->ring_mask &= ~ENGINE_MASK(_VCS(i)); + DRM_DEBUG_DRIVER("vcs%u fused off\n", i); + } } - DRM_DEBUG_DRIVER("vebox disable: %04x\n", vebox_disable); + DRM_DEBUG_DRIVER("vebox enable: %04x\n", info->vebox_enable); for (i = 0; i < I915_MAX_VECS; i++) { if (!HAS_ENGINE(dev_priv, _VECS(i))) continue; - if (!(BIT(i) & vebox_disable)) - continue; - - info->ring_mask &= ~ENGINE_MASK(_VECS(i)); - DRM_DEBUG_DRIVER("vecs%u fused off\n", i); + if (!(BIT(i) & info->vebox_enable)) { + info->ring_mask &= ~ENGINE_MASK(_VECS(i)); + DRM_DEBUG_DRIVER("vecs%u fused off\n", i); + } } } diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index af7002640cdf..b4c2c4eae78b 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -185,6 +185,10 @@ struct intel_device_info { u32 cs_timestamp_frequency_khz; + /* Enabled (not fused off) media engine bitmasks. */ + u8 vdbox_enable; + u8 vebox_enable; + struct color_luts { u16 degamma_lut_size; u16 gamma_lut_size;