| Message ID | 20181029203734.21936-1-matthew.auld@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/selftest: test aligned offsets for 64K | expand |
Quoting Matthew Auld (2018-10-29 20:37:34) > When using softpin it's not enough to just pad the vma size, we also > need to ensure the vma offset is at the start of the pt boundary, if we > plan to utilize 64K pages. Therefore to improve test coverage we should > use both aligned and unaligned gtt offsets in igt_write_huge. > > Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/selftests/huge_pages.c | 22 +++++++++++++++++---- > 1 file changed, 18 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c > index 256001b00e32..26c065c8d2c0 100644 > --- a/drivers/gpu/drm/i915/selftests/huge_pages.c > +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c > @@ -1135,7 +1135,8 @@ static int igt_write_huge(struct i915_gem_context *ctx, > n = 0; > for_each_engine(engine, i915, id) { > if (!intel_engine_can_store_dword(engine)) { > - pr_info("store-dword-imm not supported on engine=%u\n", id); > + pr_info("store-dword-imm not supported on engine=%u\n", > + id); > continue; > } > engines[n++] = engine; > @@ -1167,17 +1168,30 @@ static int igt_write_huge(struct i915_gem_context *ctx, > engine = engines[order[i] % n]; > i = (i + 1) % (n * I915_NUM_ENGINES); > > - err = __igt_write_huge(ctx, engine, obj, size, offset_low, dword, num + 1); > + /* > + * In order to utilize 64K pages we need to both pad the vma > + * size and ensure the vma offset is at the start of the pt > + * boundary, however to improve coverage we opt for testing both > + * aligned and unaligned offsets. > + */ > + if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K) > + offset_low = round_down(offset_low, > + I915_GTT_PAGE_SIZE_2M); > + > + err = __igt_write_huge(ctx, engine, obj, size, offset_low, > + dword, num + 1); > if (err) > break; > > - err = __igt_write_huge(ctx, engine, obj, size, offset_high, dword, num + 1); > + err = __igt_write_huge(ctx, engine, obj, size, offset_high, > + dword, num + 1); Gotcha, alternating between an aligned address and unaligned address. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
Quoting Patchwork (2018-10-29 23:07:25) > == Series Details == > > Series: drm/i915/selftest: test aligned offsets for 64K > URL : https://patchwork.freedesktop.org/series/51707/ > State : success > > == Summary == > > = CI Bug Log - changes from CI_DRM_5052 -> Patchwork_10636 = > > == Summary - SUCCESS == > > No regressions found. I've picked this up for pushing shortly. Thanks, -Chris
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c index 256001b00e32..26c065c8d2c0 100644 --- a/drivers/gpu/drm/i915/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c @@ -1135,7 +1135,8 @@ static int igt_write_huge(struct i915_gem_context *ctx, n = 0; for_each_engine(engine, i915, id) { if (!intel_engine_can_store_dword(engine)) { - pr_info("store-dword-imm not supported on engine=%u\n", id); + pr_info("store-dword-imm not supported on engine=%u\n", + id); continue; } engines[n++] = engine; @@ -1167,17 +1168,30 @@ static int igt_write_huge(struct i915_gem_context *ctx, engine = engines[order[i] % n]; i = (i + 1) % (n * I915_NUM_ENGINES); - err = __igt_write_huge(ctx, engine, obj, size, offset_low, dword, num + 1); + /* + * In order to utilize 64K pages we need to both pad the vma + * size and ensure the vma offset is at the start of the pt + * boundary, however to improve coverage we opt for testing both + * aligned and unaligned offsets. + */ + if (obj->mm.page_sizes.sg & I915_GTT_PAGE_SIZE_64K) + offset_low = round_down(offset_low, + I915_GTT_PAGE_SIZE_2M); + + err = __igt_write_huge(ctx, engine, obj, size, offset_low, + dword, num + 1); if (err) break; - err = __igt_write_huge(ctx, engine, obj, size, offset_high, dword, num + 1); + err = __igt_write_huge(ctx, engine, obj, size, offset_high, + dword, num + 1); if (err) break; if (igt_timeout(end_time, "%s timed out on engine=%u, offset_low=%llx offset_high=%llx, max_page_size=%x\n", - __func__, engine->id, offset_low, offset_high, max_page_size)) + __func__, engine->id, offset_low, offset_high, + max_page_size)) break; }
When using softpin it's not enough to just pad the vma size, we also need to ensure the vma offset is at the start of the pt boundary, if we plan to utilize 64K pages. Therefore to improve test coverage we should use both aligned and unaligned gtt offsets in igt_write_huge. Suggested-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/selftests/huge_pages.c | 22 +++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-)