ARM: dtsi: sun8i-r40: add mali node
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Message ID 20181101073833.2936-1-lothar.felten@gmail.com
State New
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Series
  • ARM: dtsi: sun8i-r40: add mali node
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Commit Message

Lothar Felten Nov. 1, 2018, 7:38 a.m. UTC
This patch adds a node for the mali 400 GPU of the R40/V40 SoC

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
---
 arch/arm/boot/dts/sun8i-r40.dtsi | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

Comments

Jernej Škrabec Nov. 1, 2018, 7:52 a.m. UTC | #1
Dne četrtek, 01. november 2018 ob 08:38:33 CET je Lothar Felten napisal(a):
> This patch adds a node for the mali 400 GPU of the R40/V40 SoC
> 
> Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
> ---
>  arch/arm/boot/dts/sun8i-r40.dtsi | 28 +++++++++++++++++++++++++++-
>  1 file changed, 27 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi
> b/arch/arm/boot/dts/sun8i-r40.dtsi index 6f4c9ca5a3ee..ddf765e931f3 100644
> --- a/arch/arm/boot/dts/sun8i-r40.dtsi
> +++ b/arch/arm/boot/dts/sun8i-r40.dtsi
> @@ -542,6 +542,31 @@
> 
>  		};
> 
> +		mali: gpu@1c40000 {
> +			compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
> +			reg = <0x01c40000 0x10000>;
> +			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "gp",
> +					  "gpmmu",
> +					  "pp0",
> +					  "ppmmu0",
> +					  "pp1",
> +					  "ppmmu1",
> +					  "pmu";
> +			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
> +			clock-names = "bus", "core";
> +			resets = <&ccu RST_BUS_GPU>;
> +
> +			assigned-clocks = <&ccu CLK_GPU>;
> +			assigned-clock-rates = <384000000>;

In previous e-mail I already stated that above 2 lines doesn't belong here. 
Driver is responsible for clock rate management.

> +		};
> +
>  		gmac: ethernet@1c50000 {
>  			compatible = "allwinner,sun8i-r40-gmac";
>  			syscon = <&ccu>;
> @@ -813,7 +838,8 @@
>  		};
> 
>  		hdmi_phy: hdmi-phy@1ef0000 {
> -			compatible = "allwinner,sun8i-r40-hdmi-phy";
> +			compatible = "allwinner,sun8i-r40-hdmi-phy",
> +				     "allwinner,sun50i-a64-hdmi-phy";

In previous e-mail I also stated that above changes are not related to GPU 
node and they are also not needed, since HDMI on R40 works without this.

>  			reg = <0x01ef0000 0x10000>;
>  			clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
>  				 <&ccu 7>, <&ccu 16>;

You cleary didn't read rules for patch submission. When you are sending new 
version of the patch, you have to state which version is it in subject line 
and write a changelog below "---" line.

Best regards,
Jernej

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 6f4c9ca5a3ee..ddf765e931f3 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -542,6 +542,31 @@ 
 
 		};
 
+		mali: gpu@1c40000 {
+			compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+			reg = <0x01c40000 0x10000>;
+			interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "gp",
+					  "gpmmu",
+					  "pp0",
+					  "ppmmu0",
+					  "pp1",
+					  "ppmmu1",
+					  "pmu";
+			clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+			clock-names = "bus", "core";
+			resets = <&ccu RST_BUS_GPU>;
+
+			assigned-clocks = <&ccu CLK_GPU>;
+			assigned-clock-rates = <384000000>;
+		};
+
 		gmac: ethernet@1c50000 {
 			compatible = "allwinner,sun8i-r40-gmac";
 			syscon = <&ccu>;
@@ -813,7 +838,8 @@ 
 		};
 
 		hdmi_phy: hdmi-phy@1ef0000 {
-			compatible = "allwinner,sun8i-r40-hdmi-phy";
+			compatible = "allwinner,sun8i-r40-hdmi-phy",
+				     "allwinner,sun50i-a64-hdmi-phy";
 			reg = <0x01ef0000 0x10000>;
 			clocks = <&ccu CLK_BUS_HDMI1>, <&ccu CLK_HDMI_SLOW>,
 				 <&ccu 7>, <&ccu 16>;