[v6,2/4] drm/i915/fec: Set FEC_READY in FEC_CONFIGURATION
diff mbox series

Message ID 20181105233150.1972-3-anusha.srivatsa@intel.com
State New
Headers show
Series
  • Forward Error Correction
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Commit Message

Srivatsa, Anusha Nov. 5, 2018, 11:31 p.m. UTC
If the panel supports FEC, the driver has to
set the FEC_READY bit in the dpcd register:
FEC_CONFIGURATION.

This has to happen before link training.

v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
   - change commit message. (Gaurav)

v3: rebased. (r-b Manasi)

v4: Use fec crtc state, before setting FEC_READY
bit. (Anusha)

v5: Move to intel_ddi.c
- Make the function static (Anusha)

Cc: dri-devel@lists.freedesktop.org
Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Manasi Navare Nov. 6, 2018, 12:48 a.m. UTC | #1
On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> If the panel supports FEC, the driver has to
> set the FEC_READY bit in the dpcd register:
> FEC_CONFIGURATION.
> 
> This has to happen before link training.
> 
> v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
>    - change commit message. (Gaurav)
> 
> v3: rebased. (r-b Manasi)
> 
> v4: Use fec crtc state, before setting FEC_READY
> bit. (Anusha)
> 
> v5: Move to intel_ddi.c
> - Make the function static (Anusha)
> 
> Cc: dri-devel@lists.freedesktop.org
> Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 46c1b9e12fbd..53a9b31e66a2 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3051,6 +3051,20 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
>  	I915_WRITE(MG_DP_MODE(port, 1), ln1);
>  }
>  
> +static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> +					const struct intel_crtc_state *crtc_state,
> +					int state)

u8 state should be good enough since you are writing only a byte here

> +{
> +	int ret;
> +
> +	if (!crtc_state->fec_enable)
> +		return;
> +
> +	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state);
> +	if (ret < 0)

This should ret <=0 since even if it writes 0 bytes its an error. Infact you dont need ret
you can just say"
if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state) <= 0)

After the above changes,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi
> +		DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n");
> +}
> +
>  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  				    const struct intel_crtc_state *crtc_state,
>  				    const struct drm_connector_state *conn_state)
> @@ -3091,6 +3105,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
>  	intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
>  					      true);
> +	intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY);
>  	intel_dp_start_link_train(intel_dp);
>  	if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
>  		intel_dp_stop_link_train(intel_dp);
> -- 
> 2.19.1
>
Ville Syrjälä Nov. 6, 2018, 2:51 p.m. UTC | #2
On Mon, Nov 05, 2018 at 04:48:57PM -0800, Manasi Navare wrote:
> On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> > If the panel supports FEC, the driver has to
> > set the FEC_READY bit in the dpcd register:
> > FEC_CONFIGURATION.
> > 
> > This has to happen before link training.
> > 
> > v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
> >    - change commit message. (Gaurav)
> > 
> > v3: rebased. (r-b Manasi)
> > 
> > v4: Use fec crtc state, before setting FEC_READY
> > bit. (Anusha)
> > 
> > v5: Move to intel_ddi.c
> > - Make the function static (Anusha)
> > 
> > Cc: dri-devel@lists.freedesktop.org
> > Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
> > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 46c1b9e12fbd..53a9b31e66a2 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -3051,6 +3051,20 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
> >  	I915_WRITE(MG_DP_MODE(port, 1), ln1);
> >  }
> >  
> > +static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> > +					const struct intel_crtc_state *crtc_state,
> > +					int state)
> 
> u8 state should be good enough since you are writing only a byte here

AFAICS this is never called with anything but DP_FEC_READY. So
there is absolutely benefit in making the caller have to
pass that in. Just drop the 'state' argument entirely IMO.

> 
> > +{
> > +	int ret;
> > +
> > +	if (!crtc_state->fec_enable)
> > +		return;
> > +
> > +	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state);
> > +	if (ret < 0)
> 
> This should ret <=0 since even if it writes 0 bytes its an error. Infact you dont need ret
> you can just say"
> if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state) <= 0)
> 
> After the above changes,
> 
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> 
> Manasi
> > +		DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n");

This debug msg doesn't make sense.

> > +}
> > +
> >  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> >  				    const struct intel_crtc_state *crtc_state,
> >  				    const struct drm_connector_state *conn_state)
> > @@ -3091,6 +3105,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> >  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> >  	intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
> >  					      true);
> > +	intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY);
> >  	intel_dp_start_link_train(intel_dp);
> >  	if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
> >  		intel_dp_stop_link_train(intel_dp);
> > -- 
> > 2.19.1
> >
Manasi Navare Nov. 6, 2018, 4:47 p.m. UTC | #3
On Tue, Nov 06, 2018 at 04:51:22PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 05, 2018 at 04:48:57PM -0800, Manasi Navare wrote:
> > On Mon, Nov 05, 2018 at 03:31:48PM -0800, Anusha Srivatsa wrote:
> > > If the panel supports FEC, the driver has to
> > > set the FEC_READY bit in the dpcd register:
> > > FEC_CONFIGURATION.
> > > 
> > > This has to happen before link training.
> > > 
> > > v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready
> > >    - change commit message. (Gaurav)
> > > 
> > > v3: rebased. (r-b Manasi)
> > > 
> > > v4: Use fec crtc state, before setting FEC_READY
> > > bit. (Anusha)
> > > 
> > > v5: Move to intel_ddi.c
> > > - Make the function static (Anusha)
> > > 
> > > Cc: dri-devel@lists.freedesktop.org
> > > Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
> > > Cc: Jani Nikula <jani.nikula@linux.intel.com>
> > > Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> > > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_ddi.c | 15 +++++++++++++++
> > >  1 file changed, 15 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > > index 46c1b9e12fbd..53a9b31e66a2 100644
> > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > @@ -3051,6 +3051,20 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
> > >  	I915_WRITE(MG_DP_MODE(port, 1), ln1);
> > >  }
> > >  
> > > +static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
> > > +					const struct intel_crtc_state *crtc_state,
> > > +					int state)
> > 
> > u8 state should be good enough since you are writing only a byte here
> 
> AFAICS this is never called with anything but DP_FEC_READY. So
> there is absolutely benefit in making the caller have to
> pass that in. Just drop the 'state' argument entirely IMO.

Oh yes thats correct, its a constant at DRM level and can be used directly since state never really gets set to
DP_FEC_NOT_READy. 

Manasi

> 
> > 
> > > +{
> > > +	int ret;
> > > +
> > > +	if (!crtc_state->fec_enable)
> > > +		return;
> > > +
> > > +	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state);
> > > +	if (ret < 0)
> > 
> > This should ret <=0 since even if it writes 0 bytes its an error. Infact you dont need ret
> > you can just say"
> > if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state) <= 0)
> > 
> > After the above changes,
> > 
> > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> > 
> > Manasi
> > > +		DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n");
> 
> This debug msg doesn't make sense.
> 
> > > +}
> > > +
> > >  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> > >  				    const struct intel_crtc_state *crtc_state,
> > >  				    const struct drm_connector_state *conn_state)
> > > @@ -3091,6 +3105,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> > >  		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
> > >  	intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
> > >  					      true);
> > > +	intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY);
> > >  	intel_dp_start_link_train(intel_dp);
> > >  	if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
> > >  		intel_dp_stop_link_train(intel_dp);
> > > -- 
> > > 2.19.1
> > > 
> 
> -- 
> Ville Syrjälä
> Intel

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 46c1b9e12fbd..53a9b31e66a2 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3051,6 +3051,20 @@  static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
 	I915_WRITE(MG_DP_MODE(port, 1), ln1);
 }
 
+static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
+					const struct intel_crtc_state *crtc_state,
+					int state)
+{
+	int ret;
+
+	if (!crtc_state->fec_enable)
+		return;
+
+	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, state);
+	if (ret < 0)
+		DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n");
+}
+
 static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 				    const struct intel_crtc_state *crtc_state,
 				    const struct drm_connector_state *conn_state)
@@ -3091,6 +3105,7 @@  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
 		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
 	intel_dp_sink_set_decompression_state(intel_dp, crtc_state,
 					      true);
+	intel_dp_sink_set_fec_ready(intel_dp, crtc_state, DP_FEC_READY);
 	intel_dp_start_link_train(intel_dp);
 	if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
 		intel_dp_stop_link_train(intel_dp);