| Message ID | ccf67e5f70f2d09d07268a5735ac6cee801eb9ca.1541574331.git.shunyong.yang@hxt-semitech.com (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | [v2,1/2] PCI: Add HXT vendor ID and ACS quirk | expand |
On Wed, Nov 07, 2018 at 03:24:12PM +0800, Shunyong Yang wrote: > Add the HXT vendor ID to pci_ids.h and use it in quirks. As the > design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx, > pci_quirk_qcom_rp_acs() is reused for SD4800 quirk. > > cc: Joey Zheng <yu.zheng@hxt-semitech.com> > Reviewed-by: Sinan Kaya <okaya@kernel.org> > Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> I applied both of these to pci/misc for v5.1, thanks! As I'm sure you know, both the ACS and the pciehp issues are cases where the part does not conform to the PCIe spec. Hopefully future parts will change the design so they *do* conform to the spec so we don't have to add quirks for every new part. Adding quirks works around the problem, but it's a hassle for customers (and developers and distributors) because they need kernel updates when they wouldn't otherwise. Bjorn > --- > v2: > Add Reviewed-by: Sinan Kaya. > > v1: > Initial version. > --- > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 4700d24e5d55..1e00ef6a88f4 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) > /* QCOM QDF2xxx root ports */ > { PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs }, > { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs }, > + /* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */ > + { PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs }, > /* Intel PCH root ports */ > { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, > { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, > diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > index 69f0abe1ba1a..e60a6bc38298 100644 > --- a/include/linux/pci_ids.h > +++ b/include/linux/pci_ids.h > @@ -2565,6 +2565,8 @@ > > #define PCI_VENDOR_ID_HYGON 0x1d94 > > +#define PCI_VENDOR_ID_HXT 0x1dbf > + > #define PCI_VENDOR_ID_TEKRAM 0x1de1 > #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 > > -- > 1.8.3.1 >
Hi, Bjorn, Thank you for reminding me. I will check with our IC team for these design issues. Sorry for the delay as I was taking Chinese New Year holiday. Shunyong. On 2019/2/2 7:19, Bjorn Helgaas wrote: > On Wed, Nov 07, 2018 at 03:24:12PM +0800, Shunyong Yang wrote: >> Add the HXT vendor ID to pci_ids.h and use it in quirks. As the >> design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx, >> pci_quirk_qcom_rp_acs() is reused for SD4800 quirk. >> >> cc: Joey Zheng <yu.zheng@hxt-semitech.com> >> Reviewed-by: Sinan Kaya <okaya@kernel.org> >> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> > > I applied both of these to pci/misc for v5.1, thanks! > > As I'm sure you know, both the ACS and the pciehp issues are cases where > the part does not conform to the PCIe spec. Hopefully future parts will > change the design so they *do* conform to the spec so we don't have to add > quirks for every new part. Adding quirks works around the problem, but > it's a hassle for customers (and developers and distributors) because they > need kernel updates when they wouldn't otherwise. > > Bjorn > >> --- >> v2: >> Add Reviewed-by: Sinan Kaya. >> >> v1: >> Initial version. >> --- >> >> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c >> index 4700d24e5d55..1e00ef6a88f4 100644 >> --- a/drivers/pci/quirks.c >> +++ b/drivers/pci/quirks.c >> @@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) >> /* QCOM QDF2xxx root ports */ >> { PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs }, >> { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs }, >> + /* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */ >> + { PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs }, >> /* Intel PCH root ports */ >> { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, >> { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, >> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h >> index 69f0abe1ba1a..e60a6bc38298 100644 >> --- a/include/linux/pci_ids.h >> +++ b/include/linux/pci_ids.h >> @@ -2565,6 +2565,8 @@ >> >> #define PCI_VENDOR_ID_HYGON 0x1d94 >> >> +#define PCI_VENDOR_ID_HXT 0x1dbf >> + >> #define PCI_VENDOR_ID_TEKRAM 0x1de1 >> #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 >> >> -- >> 1.8.3.1 >> >
On Mon, Feb 11, 2019 at 12:52:29AM +0000, Yang, Shunyong wrote: > Hi, Bjorn, > > Thank you for reminding me. I will check with our IC team for these > design issues. > Sorry for the delay as I was taking Chinese New Year holiday. Hi, happened to apply a new similar quirk for Qualcomm today, so just checking in to see whether there are any new HXT devices that also require this quirk, or whether we should apply the quirk for *all* HXT devices as we do for Intel. Bjorn > On 2019/2/2 7:19, Bjorn Helgaas wrote: > > On Wed, Nov 07, 2018 at 03:24:12PM +0800, Shunyong Yang wrote: > >> Add the HXT vendor ID to pci_ids.h and use it in quirks. As the > >> design of HXT SD4800 ACS feature is the same as QCOM QDF2xxx, > >> pci_quirk_qcom_rp_acs() is reused for SD4800 quirk. > >> > >> cc: Joey Zheng <yu.zheng@hxt-semitech.com> > >> Reviewed-by: Sinan Kaya <okaya@kernel.org> > >> Signed-off-by: Shunyong Yang <shunyong.yang@hxt-semitech.com> > > > > I applied both of these to pci/misc for v5.1, thanks! > > > > As I'm sure you know, both the ACS and the pciehp issues are cases where > > the part does not conform to the PCIe spec. Hopefully future parts will > > change the design so they *do* conform to the spec so we don't have to add > > quirks for every new part. Adding quirks works around the problem, but > > it's a hassle for customers (and developers and distributors) because they > > need kernel updates when they wouldn't otherwise. > > > > Bjorn > > > >> --- > >> v2: > >> Add Reviewed-by: Sinan Kaya. > >> > >> v1: > >> Initial version. > >> --- > >> > >> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > >> index 4700d24e5d55..1e00ef6a88f4 100644 > >> --- a/drivers/pci/quirks.c > >> +++ b/drivers/pci/quirks.c > >> @@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) > >> /* QCOM QDF2xxx root ports */ > >> { PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs }, > >> { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs }, > >> + /* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */ > >> + { PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs }, > >> /* Intel PCH root ports */ > >> { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, > >> { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, > >> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h > >> index 69f0abe1ba1a..e60a6bc38298 100644 > >> --- a/include/linux/pci_ids.h > >> +++ b/include/linux/pci_ids.h > >> @@ -2565,6 +2565,8 @@ > >> > >> #define PCI_VENDOR_ID_HYGON 0x1d94 > >> > >> +#define PCI_VENDOR_ID_HXT 0x1dbf > >> + > >> #define PCI_VENDOR_ID_TEKRAM 0x1de1 > >> #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29 > >> > >> -- > >> 1.8.3.1 > >> > > >
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 4700d24e5d55..1e00ef6a88f4 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4495,6 +4495,8 @@ static int pci_quirk_mf_endpoint_acs(struct pci_dev *dev, u16 acs_flags) /* QCOM QDF2xxx root ports */ { PCI_VENDOR_ID_QCOM, 0x0400, pci_quirk_qcom_rp_acs }, { PCI_VENDOR_ID_QCOM, 0x0401, pci_quirk_qcom_rp_acs }, + /* HXT SD4800 root ports. The ACS design is same as QCOM QDF2xxx */ + { PCI_VENDOR_ID_HXT, 0x0401, pci_quirk_qcom_rp_acs }, /* Intel PCH root ports */ { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_pch_acs }, { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, pci_quirk_intel_spt_pch_acs }, diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 69f0abe1ba1a..e60a6bc38298 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2565,6 +2565,8 @@ #define PCI_VENDOR_ID_HYGON 0x1d94 +#define PCI_VENDOR_ID_HXT 0x1dbf + #define PCI_VENDOR_ID_TEKRAM 0x1de1 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29