From patchwork Thu Nov 8 13:15:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jian Hu X-Patchwork-Id: 10674185 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1FFFC109C for ; Thu, 8 Nov 2018 13:16:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0E7C82D572 for ; Thu, 8 Nov 2018 13:16:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 029E22D665; Thu, 8 Nov 2018 13:16:21 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 791B62D572 for ; Thu, 8 Nov 2018 13:16:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=OW9/0Uaf39YrtgkKPF0CUP6yG90hKBojB8k8xH5dEFU=; b=pqqiLO8wDiyzpL Z2ftmHYAWUDF8LnOcuTX+t5mQzMToaNIhj/AHe1DPnniRZ+lwa6cvp5CIGh4UdcDi2ad9rYpGw3wK 2SBgNj66ZBq9dawb+mlEYItrMDmwWgFXLEUX8b/PYPnFNFGgHY63ToQCYzgVcWZ2m6pOPexTLl0EY LaUuYMV7Isscz0pFMlVYEnoTlfuUKtkQ8T8f/1ufxSVeZSu+d31suaOJsqPRxwxeg1oAIgXnzL5ZJ UQxZZdUJWT9YQ1xykEehIV+etpe2Ks9k9sR6scAOoFt49fBUDGMpNSH2vJTwoFVPNKBOlS/aNTGnb jiv2IJSk8TRY82gGASfg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gKkAW-0001v2-FH; Thu, 08 Nov 2018 13:16:20 +0000 Received: from merlin.infradead.org ([2001:8b0:10b:1231::1]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gKkAV-0001u2-5W; Thu, 08 Nov 2018 13:16:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=merlin.20170209; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=Jy82ezAvwFxPE16wxVqCPchf9eN8kPNw71kKoR2ARiE=; b=EJG5zNwRLLwfQGqpu4p69wxo6 i38CPW4LuR725GFa0rwuy0h6nBECcikV2OqcDPoROp27tH2v3Hyge1FSiM8BeSmKqf1c0VAFGdc/O wLXjiEnwdcxO4h5bCHlrk+97e5MA7L5kqPc8QIdkeE+PTLWDoIaPw3grkYHkBBvpvL0zGUfJ5RZ6y R8HtA3Fes+ZXBqpstGAbRnc8XjQ2/fa6eG7kFEvDWDfXq485QgBoKbpj4opzrEeMPc8gUU+nTzwf+ nQS7SQvC9dx8Iy/NbT0/9Os9Mp70JppeYN5egZZE+jtYhV2VM1N5PR87Rr7mYA7yIPNB2nXSF4xEz FyQorA8VA==; Received: from mail-sh2.amlogic.com ([58.32.228.45]) by merlin.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gKkAR-0001Ow-Gb; Thu, 08 Nov 2018 13:16:17 +0000 Received: from droid15-sz.amlogic.com (10.28.8.25) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Thu, 8 Nov 2018 21:15:23 +0800 From: Jian Hu To: Jerome Brunet , Neil Armstrong Subject: [PATCH v4 1/2] dt-bindings: clk: meson-g12a: Add G12A EE Clock Bindings Date: Thu, 8 Nov 2018 21:15:10 +0800 Message-ID: <1541682912-120480-2-git-send-email-jian.hu@amlogic.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1541682912-120480-1-git-send-email-jian.hu@amlogic.com> References: <1541682912-120480-1-git-send-email-jian.hu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.28.8.25] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181108_081615_725447_DDFFF2B0 X-CRM114-Status: GOOD ( 11.77 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Jianxin Pan , devicetree@vger.kernel.org, Martin Blumenstingl , Kevin Hilman , Michael Turquette , Yixun Lan , linux-kernel@vger.kernel.org, Stephen Boyd , Jian Hu , Qiufang Dai , Carlo Caione , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add new clock controller compatible and dt-bingdings headers for the Everything-Else domain of the g12a SoC Signed-off-by: Jian Hu Reviewed-by: Rob Herring --- .../bindings/clock/amlogic,gxbb-clkc.txt | 1 + include/dt-bindings/clock/g12a-clkc.h | 93 ++++++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 include/dt-bindings/clock/g12a-clkc.h diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt index e950599..0833006 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt @@ -9,6 +9,7 @@ Required Properties: "amlogic,gxbb-clkc" for GXBB SoC, "amlogic,gxl-clkc" for GXL and GXM SoC, "amlogic,axg-clkc" for AXG SoC. + "amlogic,g12a-clkc" for G12A SoC. - #clock-cells: should be 1. diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h new file mode 100644 index 0000000..b55e6e1 --- /dev/null +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Meson-G12A clock tree IDs + * + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + */ + +#ifndef __G12A_CLKC_H +#define __G12A_CLKC_H + +#define CLKID_SYS_PLL 0 +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 2 +#define CLKID_FCLK_DIV3 3 +#define CLKID_FCLK_DIV4 4 +#define CLKID_FCLK_DIV5 5 +#define CLKID_FCLK_DIV7 6 +#define CLKID_GP0_PLL 7 +#define CLKID_CLK81 10 +#define CLKID_MPLL0 11 +#define CLKID_MPLL1 12 +#define CLKID_MPLL2 13 +#define CLKID_MPLL3 14 +#define CLKID_DDR 15 +#define CLKID_DOS 16 +#define CLKID_AUDIO_LOCKER 17 +#define CLKID_MIPI_DSI_HOST 18 +#define CLKID_ETH_PHY 19 +#define CLKID_ISA 20 +#define CLKID_PL301 21 +#define CLKID_PERIPHS 22 +#define CLKID_SPICC0 23 +#define CLKID_I2C 24 +#define CLKID_SANA 25 +#define CLKID_SD 26 +#define CLKID_RNG0 27 +#define CLKID_UART0 28 +#define CLKID_SPICC1 29 +#define CLKID_HIU_IFACE 30 +#define CLKID_MIPI_DSI_PHY 31 +#define CLKID_ASSIST_MISC 32 +#define CLKID_SD_EMMC_A 33 +#define CLKID_SD_EMMC_B 34 +#define CLKID_SD_EMMC_C 35 +#define CLKID_AUDIO_CODEC 36 +#define CLKID_AUDIO 37 +#define CLKID_ETH 38 +#define CLKID_DEMUX 39 +#define CLKID_AUDIO_IFIFO 40 +#define CLKID_ADC 41 +#define CLKID_UART1 42 +#define CLKID_G2D 43 +#define CLKID_RESET 44 +#define CLKID_PCIE_COMB 45 +#define CLKID_PARSER 46 +#define CLKID_USB 47 +#define CLKID_PCIE_PHY 48 +#define CLKID_AHB_ARB0 49 +#define CLKID_AHB_DATA_BUS 50 +#define CLKID_AHB_CTRL_BUS 51 +#define CLKID_HTX_HDCP22 52 +#define CLKID_HTX_PCLK 53 +#define CLKID_BT656 54 +#define CLKID_USB1_DDR_BRIDGE 55 +#define CLKID_MMC_PCLK 56 +#define CLKID_UART2 57 +#define CLKID_VPU_INTR 58 +#define CLKID_GIC 59 +#define CLKID_SD_EMMC_B_CLK0 60 +#define CLKID_SD_EMMC_C_CLK0 61 +#define CLKID_HIFI_PLL 71 +#define CLKID_VCLK2_VENCI0 77 +#define CLKID_VCLK2_VENCI1 78 +#define CLKID_VCLK2_VENCP0 79 +#define CLKID_VCLK2_VENCP1 80 +#define CLKID_VCLK2_VENCT0 81 +#define CLKID_VCLK2_VENCT1 82 +#define CLKID_VCLK2_OTHER 83 +#define CLKID_VCLK2_ENCI 84 +#define CLKID_VCLK2_ENCP 85 +#define CLKID_DAC_CLK 86 +#define CLKID_AOCLK 87 +#define CLKID_IEC958 88 +#define CLKID_ENC480P 89 +#define CLKID_RNG1 90 +#define CLKID_VCLK2_ENCT 91 +#define CLKID_VCLK2_ENCL 92 +#define CLKID_VCLK2_VENCLMMC 93 +#define CLKID_VCLK2_VENCL 94 +#define CLKID_VCLK2_OTHER1 95 +#define CLKID_FCLK_DIV2P5 96 + +#endif /* __G12A_CLKC_H */