diff mbox series

[CI,1/3] drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations

Message ID 20181112232313.26373-1-paulo.r.zanoni@intel.com (mailing list archive)
State New, archived
Headers show
Series [CI,1/3] drm/i915/cnp+: update to the new RAWCLK_FREQ recommendations | expand

Commit Message

Zanoni, Paulo R Nov. 12, 2018, 11:23 p.m. UTC 
BSpec was updated and now there's no more "subtract 1" to the
Microsecond Counter Divider field.

It seems this should help fixing some GMBUS issues. I'm not aware of
any specific open bug that could be solved by this patch.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 8d74276029e6..810670976e86 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -2660,7 +2660,7 @@  static int cnp_rawclk(struct drm_i915_private *dev_priv)
 		fraction = 200;
 	}
 
-	rawclk = CNP_RAWCLK_DIV((divider / 1000) - 1);
+	rawclk = CNP_RAWCLK_DIV(divider / 1000);
 	if (fraction)
 		rawclk |= CNP_RAWCLK_FRAC(DIV_ROUND_CLOSEST(1000,
 							    fraction) - 1);
@@ -2676,12 +2676,12 @@  static int icp_rawclk(struct drm_i915_private *dev_priv)
 
 	if (I915_READ(SFUSE_STRAP) & SFUSE_STRAP_RAW_FREQUENCY) {
 		frequency = 24000;
-		divider = 23;
+		divider = 24;
 		numerator = 0;
 		denominator = 0;
 	} else {
 		frequency = 19200;
-		divider = 18;
+		divider = 19;
 		numerator = 1;
 		denominator = 4;
 	}