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Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "catalin.marinas@arm.com" , "will.deacon@arm.com" Subject: [PATCHv2 10/25] PCI: mobiveil: fix the INTx process error Thread-Topic: [PATCHv2 10/25] PCI: mobiveil: fix the INTx process error Thread-Index: AQHUgLMjn4TF2XEFDkS2g0YPrTFmig== Date: Tue, 20 Nov 2018 09:26:37 +0000 Message-ID: <20181120092615.11680-11-Zhiqiang.Hou@nxp.com> References: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20181120092615.11680-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK2PR03CA0050.apcprd03.prod.outlook.com (2603:1096:202:17::20) To AM6PR04MB5781.eurprd04.prod.outlook.com (2603:10a6:20b:aa::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; 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Lian" , "Z.q. Hou" , Xiaowei Bao , Mingkai Hu Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang In the loop block, there is not code change the loop key, this patch updated the loop key by re-read the INTx status register. This patch also change to clear the handled INTx status. Note: Need MV to test this fix. Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") Signed-off-by: Hou Zhiqiang reviewed-by: Minghuan Lian --- V2: - Added fixes entry. drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c index 4ba458474e42..78e575e71f4d 100644 --- a/drivers/pci/controller/pcie-mobiveil.c +++ b/drivers/pci/controller/pcie-mobiveil.c @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) /* Handle INTx */ if (intr_status & PAB_INTP_INTX_MASK) { shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; shifted_status >>= PAB_INTX_START; do { for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", bit); - /* clear interrupt */ - csr_writel(pcie, - shifted_status << PAB_INTX_START, + /* clear interrupt handled */ + csr_writel(pcie, 1 << (PAB_INTX_START + bit), PAB_INTP_AMBA_MISC_STAT); } - } while ((shifted_status >> PAB_INTX_START) != 0); + + shifted_status = csr_readl(pcie, + PAB_INTP_AMBA_MISC_STAT); + shifted_status &= PAB_INTP_INTX_MASK; + shifted_status >>= PAB_INTX_START; + } while (shifted_status != 0); } /* read extra MSI status register */