From patchwork Thu Nov 22 18:43:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 10694705 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DD09614DE for ; Thu, 22 Nov 2018 18:43:24 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D1F822CEED for ; Thu, 22 Nov 2018 18:43:24 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C45AC2CEFB; Thu, 22 Nov 2018 18:43:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 562DA2CEED for ; Thu, 22 Nov 2018 18:43:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729692AbeKWFX7 (ORCPT ); Fri, 23 Nov 2018 00:23:59 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:37811 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729652AbeKWFX7 (ORCPT ); Fri, 23 Nov 2018 00:23:59 -0500 Received: by mail-lj1-f193.google.com with SMTP id e5-v6so8732165lja.4 for ; Thu, 22 Nov 2018 10:43:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cogentembedded-com.20150623.gappssmtp.com; s=20150623; h=subject:from:to:references:organization:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=vlcLr63GvcDk79yjDzZ3jOfhcgcoKQJL2Af67EiHTkc=; b=18gT9t5ZwK4A6yD3waPNelHvXUWGXbSP/Ai/UzCWfUgFcMbylWwhFU4JKKMoY1BqBs ekXxxMTqJxEQWkyfBFE5uLE5xOXlqJzt61jOU5Mc/HrDE+ixEShfKnusTDeNjefpUSVQ a93xWchaeWBqah2Qy76axxfCxDA2M5OzNJHBsq7ayhxb1vqkCRdAsuiR++4Qj6zgyZcM nkMgb+mISdHRdPWaySmul2rmVUjJhFuU9wPw1YkAVMVKMCnvCuNyxtcyP4i3dcDXrmCN JY/yn4v+hKbVbDKsNontUVkHtdsBXYuT+cvTNTERXuQGPTTHQYnCZJWT7CJMjfkArQb7 K3lg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:from:to:references:organization :message-id:date:user-agent:mime-version:in-reply-to :content-language:content-transfer-encoding; bh=vlcLr63GvcDk79yjDzZ3jOfhcgcoKQJL2Af67EiHTkc=; b=BP/rXeHGz8cQdkPkekh9AjvcurT7G0571CMUHKI+LdmBlxzERvbXY0GTc5zk2RIUjq dAbCWRwZ8uYDyChwlUr2UHjeVZ3Ohwt3MUBMwSPEUlsnMBBlMsj+GcODPS+kjKY11DWB 4GGlzv5bpcsNWKApU+eBeArD25/4SOMkOZQ9SosxJ8BcnnTB+LcsDzVjo50ylymK5e/a s2QCwXowsksMB+4YyzeJ8PSZyIwmQLpUFDdfDy6D85YUc0BaB5M4n29t5MjAUDWB2mgU 5pr7KF7LHXvm1zJBKLUjj+693EDc+JH9Itk/WjjIk7mfaOrQery8cCb8muJQVtx4Sy05 YEoA== X-Gm-Message-State: AA+aEWYW892hMPLBrYjJg/dOJLJrU4Oo2+KYk5OO0SZ/sGLxDMOIMMwx KfJXNAPpFYNyA/Kr1TeJIH+kEw== X-Google-Smtp-Source: AJdET5dYMR14SNPNlEl5O9l1yR20pjqVQ/zhTmHjCsO5R5tLVpVFDUAUxXrgBgUuFbZ2gtMJ9+idlA== X-Received: by 2002:a2e:7403:: with SMTP id p3-v6mr7717496ljc.97.1542912201419; Thu, 22 Nov 2018 10:43:21 -0800 (PST) Received: from wasted.cogentembedded.com ([31.173.85.10]) by smtp.gmail.com with ESMTPSA id u26-v6sm7511390lji.22.2018.11.22.10.43.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 22 Nov 2018 10:43:20 -0800 (PST) Subject: [PATCH 3/4] clk: renesas: rcar-gen3-cpg: add RPCD2 clock From: Sergei Shtylyov To: linux-renesas-soc@vger.kernel.org, Michael Turquette , Stephen Boyd , Geert Uytterhoeven , linux-clk@vger.kernel.org References: Organization: Cogent Embedded Message-ID: <71808cdc-c95b-8ba2-10aa-01f6a6af7cf1@cogentembedded.com> Date: Thu, 22 Nov 2018 21:43:19 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1 MIME-Version: 1.0 In-Reply-To: Content-Language: en-MW Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the RPCD2 clock for the R-Car gen3 SoCs -- this clock is en/disabled via the RPCCKCR register on all the R-Car gen3 SoCs except V3M (R8A77970) and has a fixed divisor of 2 (applied to the RPC clock). Signed-off-by: Sergei Shtylyov --- drivers/clk/renesas/rcar-gen3-cpg.c | 87 ++++++++++++++++++++++++++++++++++++ drivers/clk/renesas/rcar-gen3-cpg.h | 1 2 files changed, 88 insertions(+) Index: renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.c =================================================================== --- renesas-drivers.orig/drivers/clk/renesas/rcar-gen3-cpg.c +++ renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.c @@ -524,6 +524,89 @@ static struct clk * __init cpg_rpc_clk_r return clk; } +static int cpg_rpcd2_clock_enable(struct clk_hw *hw) +{ + struct rpc_clock *clock = to_rpc_clock(hw); + + cpg_reg_modify(clock->reg, CPG_RPC_CKSTP2, 0); + + return 0; +} + +static void cpg_rpcd2_clock_disable(struct clk_hw *hw) +{ + struct rpc_clock *clock = to_rpc_clock(hw); + + cpg_reg_modify(clock->reg, 0, CPG_RPC_CKSTP2); +} + +static int cpg_rpcd2_clock_is_enabled(struct clk_hw *hw) +{ + struct rpc_clock *clock = to_rpc_clock(hw); + + return !(readl(clock->reg) & CPG_RPC_CKSTP2); +} + +static unsigned long cpg_rpcd2_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return parent_rate / 2; +} + +static long cpg_rpcd2_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + return *parent_rate / 2; +} + +static int cpg_rpcd2_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + /* + * We must report success but we can do so unconditionally because + * the round_rate() method returns values that ensure this call is + * a nop. + */ + return 0; +} + +static const struct clk_ops cpg_rpcd2_clock_ops = { + .enable = cpg_rpcd2_clock_enable, + .disable = cpg_rpcd2_clock_disable, + .is_enabled = cpg_rpcd2_clock_is_enabled, + .recalc_rate = cpg_rpcd2_recalc_rate, + .round_rate = cpg_rpcd2_round_rate, + .set_rate = cpg_rpcd2_set_rate, +}; + +static struct clk * __init cpg_rpcd2_clk_register(const struct cpg_core_clk *core, + void __iomem *base, + const char *parent_name) +{ + struct clk_init_data init; + struct rpc_clock *clock; + struct clk *clk; + + clock = kzalloc(sizeof(*clock), GFP_KERNEL); + if (!clock) + return ERR_PTR(-ENOMEM); + + init.name = core->name; + init.ops = &cpg_rpcd2_clock_ops; + init.flags = CLK_IS_BASIC | CLK_SET_RATE_PARENT; + init.parent_names = &parent_name; + init.num_parents = 1; + + clock->reg = base + CPG_RPCCKCR; + clock->hw.init = &init; + + clk = clk_register(NULL, &clock->hw); + if (IS_ERR(clk)) + kfree(clock); + + return clk; +} + static const struct rcar_gen3_cpg_pll_config *cpg_pll_config __initdata; static unsigned int cpg_clk_extalr __initdata; @@ -701,6 +784,10 @@ struct clk * __init rcar_gen3_cpg_clk_re case CLK_TYPE_GEN3_RPC: return cpg_rpc_clk_register(core, base, __clk_get_name(parent)); + case CLK_TYPE_GEN3_RPCD2: + return cpg_rpcd2_clk_register(core, base, + __clk_get_name(parent)); + default: return ERR_PTR(-EINVAL); } Index: renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.h =================================================================== --- renesas-drivers.orig/drivers/clk/renesas/rcar-gen3-cpg.h +++ renesas-drivers/drivers/clk/renesas/rcar-gen3-cpg.h @@ -24,6 +24,7 @@ enum rcar_gen3_clk_types { CLK_TYPE_GEN3_OSC, /* OSC EXTAL predivider and fixed divider */ CLK_TYPE_GEN3_RCKSEL, /* Select parent/divider using RCKCR.CKSEL */ CLK_TYPE_GEN3_RPC, + CLK_TYPE_GEN3_RPCD2, /* SoC specific definitions start here */ CLK_TYPE_GEN3_SOC_BASE,