From patchwork Fri Nov 23 16:17:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10696171 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8787A13BF for ; Fri, 23 Nov 2018 16:18:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 756B22C18A for ; Fri, 23 Nov 2018 16:18:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 68D042CBC8; Fri, 23 Nov 2018 16:18:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 193682C18A for ; Fri, 23 Nov 2018 16:18:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HziGAP9+Dq6dL9im7Q5wPCVGeO0fUcsVDh5W0WuTygY=; b=CQIoUaWlWiUkmk 0d07cqC5jT8j74NQhYYJlVT7USe+SLdlCyft9dXYZesU9tFVDAb67LWWVdyPIW4bJEdnj5u3nAVSJ 4IPu7PRQ/UNbbJ87SjQpDMZLB9nGN+yf5yzF0JOYcpzVMn9mevJYABzlpEMtvd2Q/XWHj857CrKZl GXvbg4CL+Im3ttehy1+vJy7o4StC+2GuU76JyXYjUcFnZkC6HdBYUN90QfaCRP0gQAi6S0WEaRbeH jQVrlENFjWC9EIiFPBPc+9dm2qftmsGqfOfYj1X7o8MOs57Y0lnb/9mgCDxbBHPPPuds3HsVs3YQv H0UfRpbgWz3zCGLKlAsQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQE9c-0004bB-14; Fri, 23 Nov 2018 16:18:04 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gQE9Y-0004XE-DU for linux-arm-kernel@lists.infradead.org; Fri, 23 Nov 2018 16:18:02 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 49AF720DD6; Fri, 23 Nov 2018 17:17:51 +0100 (CET) Received: from localhost.localdomain (unknown [37.164.168.97]) by mail.bootlin.com (Postfix) with ESMTPSA id 1C18D20DBE; Fri, 23 Nov 2018 17:17:40 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Zhang Rui , Eduardo Valentin , Daniel Lezcano Subject: [PATCH v2 3/6] dt-bindings: ap806: document the thermal interrupt capabilities Date: Fri, 23 Nov 2018 17:17:27 +0100 Message-Id: <20181123161730.11289-4-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181123161730.11289-1-miquel.raynal@bootlin.com> References: <20181123161730.11289-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_081800_584269_578782DD X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, linux-pm@vger.kernel.org, Antoine Tenart , Catalin Marinas , Will Deacon , Russell King , Maxime Chevallier , Nadav Haklai , Marc Zyngier , David Sniatkiwicz , Rob Herring , Thomas Petazzoni , Miquel Raynal , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The thermal IP can produce interrupts on overheat situation. Describe them. Signed-off-by: Miquel Raynal --- .../bindings/arm/marvell/ap806-system-controller.txt | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt index 3fd21bb7cb37..35e8dd2edfd2 100644 --- a/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt +++ b/Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt @@ -114,12 +114,18 @@ Documentation/devicetree/bindings/thermal/thermal.txt The thermal IP can probe the temperature all around the processor. It may feature several channels, each of them wired to one sensor. +It is possible to setup an overheat interrupt by giving at least one +critical point to any subnode of the thermal-zone node. + Required properties: - compatible: must be one of: * marvell,armada-ap806-thermal - reg: register range associated with the thermal functions. Optional properties: +- interrupt-parent/interrupts: overheat interrupt handle. Should point to + line 18 of the SEI irqchip. + See interrupt-controller/interrupts.txt - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer to this IP and represents the channel ID. There is one sensor per channel. O refers to the thermal IP internal channel, while positive @@ -133,6 +139,8 @@ ap_syscon1: system-controller@6f8000 { ap_thermal: thermal-sensor@80 { compatible = "marvell,armada-ap806-thermal"; reg = <0x80 0x10>; + interrupt-parent = <&sei>; + interrupts = <18>; #thermal-sensor-cells = <1>; }; };