| Message ID | 1543562288-28638-1-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: imx6sl: ensure MMDC CH0 handshake is bypassed | expand |
Quoting Anson Huang (2018-11-29 23:23:47) > Same as other i.MX6 SoCs, ensure unused MMDC channel's > handshake is bypassed, this is to make sure no request > signal will be generated when periphe_clk_sel is changed > or SRC warm reset is triggered. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Does this need a fixes tag?
Hi, Stephen Best Regards! Anson Huang > -----Original Message----- > From: Stephen Boyd [mailto:sboyd@kernel.org] > Sent: 2018年11月30日 15:25 > To: kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org; > linux-clk@vger.kernel.org; linux-kernel@vger.kernel.org; > mturquette@baylibre.com; s.hauer@pengutronix.de; shawnguo@kernel.org; > Anson Huang <anson.huang@nxp.com>; Fabio Estevam > <fabio.estevam@nxp.com> > Cc: dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH] clk: imx6sl: ensure MMDC CH0 handshake is bypassed > > Quoting Anson Huang (2018-11-29 23:23:47) > > Same as other i.MX6 SoCs, ensure unused MMDC channel's handshake is > > bypassed, this is to make sure no request signal will be generated > > when periphe_clk_sel is changed or SRC warm reset is triggered. > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > > Does this need a fixes tag? Normally this bit is 1b'1 by reset, but during our development, it used to be overwritten in u-boot and lead to some clock operation fail in Linux kernel, that is why we ensure it in clock driver early phase. IMO, it should be OK to not add a fix tag, since it is just to make sure the setting is correct and NOT depends on the hardware reset value which could be changed in u-boot. Anson.
Quoting Anson Huang (2018-11-29 23:37:14) > Hi, Stephen > > Best Regards! > Anson Huang > > > -----Original Message----- > > From: Stephen Boyd [mailto:sboyd@kernel.org] > > Sent: 2018年11月30日 15:25 > > To: kernel@pengutronix.de; linux-arm-kernel@lists.infradead.org; > > linux-clk@vger.kernel.org; linux-kernel@vger.kernel.org; > > mturquette@baylibre.com; s.hauer@pengutronix.de; shawnguo@kernel.org; > > Anson Huang <anson.huang@nxp.com>; Fabio Estevam > > <fabio.estevam@nxp.com> > > Cc: dl-linux-imx <linux-imx@nxp.com> > > Subject: Re: [PATCH] clk: imx6sl: ensure MMDC CH0 handshake is bypassed > > > > Quoting Anson Huang (2018-11-29 23:23:47) > > > Same as other i.MX6 SoCs, ensure unused MMDC channel's handshake is > > > bypassed, this is to make sure no request signal will be generated > > > when periphe_clk_sel is changed or SRC warm reset is triggered. > > > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > > > > Does this need a fixes tag? > > Normally this bit is 1b'1 by reset, but during our development, it used to be > overwritten in u-boot and lead to some clock operation fail in Linux kernel, that is why we ensure it > in clock driver early phase. IMO, it should be OK to not add a fix tag, since it is just > to make sure the setting is correct and NOT depends on the hardware reset value which > could be changed in u-boot. > > Hmm ok.
Quoting Anson Huang (2018-11-29 23:23:47) > Same as other i.MX6 SoCs, ensure unused MMDC channel's > handshake is bypassed, this is to make sure no request > signal will be generated when periphe_clk_sel is changed > or SRC warm reset is triggered. > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- Applied to clk-next
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c index 6fcfbbd..e13d881 100644 --- a/drivers/clk/imx/clk-imx6sl.c +++ b/drivers/clk/imx/clk-imx6sl.c @@ -17,6 +17,8 @@ #include "clk.h" +#define CCDR 0x4 +#define BM_CCM_CCDR_MMDC_CH0_MASK (1 << 17) #define CCSR 0xc #define BM_CCSR_PLL1_SW_CLK_SEL (1 << 2) #define CACRR 0x10 @@ -411,6 +413,10 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) clks[IMX6SL_CLK_USDHC3] = imx_clk_gate2("usdhc3", "usdhc3_podf", base + 0x80, 6); clks[IMX6SL_CLK_USDHC4] = imx_clk_gate2("usdhc4", "usdhc4_podf", base + 0x80, 8); + /* Ensure the MMDC CH0 handshake is bypassed */ + writel_relaxed(readl_relaxed(base + CCDR) | + BM_CCM_CCDR_MMDC_CH0_MASK, base + CCDR); + imx_check_clocks(clks, ARRAY_SIZE(clks)); clk_data.clks = clks;
Same as other i.MX6 SoCs, ensure unused MMDC channel's handshake is bypassed, this is to make sure no request signal will be generated when periphe_clk_sel is changed or SRC warm reset is triggered. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- drivers/clk/imx/clk-imx6sl.c | 6 ++++++ 1 file changed, 6 insertions(+)