From patchwork Mon Dec 10 10:36:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 10721077 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B13F213BF for ; Mon, 10 Dec 2018 10:37:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A1A6129B1A for ; Mon, 10 Dec 2018 10:37:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9648529BC2; Mon, 10 Dec 2018 10:37:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5337729B1A for ; Mon, 10 Dec 2018 10:37:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2BDE6E98C; Mon, 10 Dec 2018 10:36:57 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-ed1-x542.google.com (mail-ed1-x542.google.com [IPv6:2a00:1450:4864:20::542]) by gabe.freedesktop.org (Postfix) with ESMTPS id F33106E984 for ; Mon, 10 Dec 2018 10:36:53 +0000 (UTC) Received: by mail-ed1-x542.google.com with SMTP id b14so9019418edt.6 for ; Mon, 10 Dec 2018 02:36:53 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MS4TiUW3mXcW2vxlt2KruqWF3duOJRQUhvXcb4QfQyg=; b=b7QPqQ4oCVUi0Hxq2/B0mAkosJz4Q+qbB9YDXmgiWaFcu7o6aOxu2ceka0AlExgsqm 2FgEvYrX8qjgBqJF+IFDuWhcsa+G5+m2CnNMBdOUup+EyCRIBFYqvEEG+G9CogiHJ2jy Z0LlyRh+pQ+OG1zVavlMa9U1oz4rVXaokBLkMDPkL688mfzlY//kciW06iWeMcFwFYMl yZbpDY21CnyrRyDlMBQxSCGq0tXe6vHTNH0wFShswMHoHEnUTRdc7zmU9gnoi2U9fcfG nljuVMyquLiF4J49VLjQuSMbEATa1XwoOYLZg4Ag1R1R+3rpSqG9QJhyYo09SN4nXJjp BJgw== X-Gm-Message-State: AA+aEWb8/4ehs4IXhwChEbjjzxZcrakSlhL67PO1QY8q0hC00TmgOEG6 7TCL7eJGVBnkMW3bCeoEKEJQ18G+ZVU= X-Google-Smtp-Source: AFSGD/VBhwhwpXMcF/WqlfqrIFWeyUnYoYAKfyugWwKrywPx+aWhzf1Mma1LvnRSHr7+48mh4dGruw== X-Received: by 2002:a17:906:59d6:: with SMTP id m22-v6mr9293378ejs.20.1544438212050; Mon, 10 Dec 2018 02:36:52 -0800 (PST) Received: from phenom.ffwll.local ([2a02:168:569e:0:3106:d637:d723:e855]) by smtp.gmail.com with ESMTPSA id q50sm3223862edd.66.2018.12.10.02.36.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 02:36:51 -0800 (PST) From: Daniel Vetter To: Intel Graphics Development Date: Mon, 10 Dec 2018 11:36:40 +0100 Message-Id: <20181210103641.31259-4-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 2.20.0.rc1 In-Reply-To: <20181210103641.31259-1-daniel.vetter@ffwll.ch> References: <20181210103641.31259-1-daniel.vetter@ffwll.ch> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] mm, notifier: Catch sleeping/blocking for !blockable X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michal Hocko , Daniel Vetter , LKML , DRI Development , linux-mm@kvack.org, =?utf-8?b?SsOpcsO0bWUgR2xpc3Nl?= , David Rientjes , Daniel Vetter , Andrew Morton , =?utf-8?q?Christian_K=C3=B6nig?= Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP We need to make sure implementations don't cheat and don't have a possible schedule/blocking point deeply burried where review can't catch it. I'm not sure whether this is the best way to make sure all the might_sleep() callsites trigger, and it's a bit ugly in the code flow. But it gets the job done. Inspired by an i915 patch series which did exactly that, because the rules haven't been entirely clear to us. v2: Use the shiny new non_block_start/end annotations instead of abusing preempt_disable/enable. Cc: Andrew Morton Cc: Michal Hocko Cc: David Rientjes Cc: "Christian König" Cc: Daniel Vetter Cc: "Jérôme Glisse" Cc: linux-mm@kvack.org Signed-off-by: Daniel Vetter --- mm/mmu_notifier.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/mm/mmu_notifier.c b/mm/mmu_notifier.c index ccc22f21b735..a50ed7d1ecef 100644 --- a/mm/mmu_notifier.c +++ b/mm/mmu_notifier.c @@ -185,7 +185,13 @@ int __mmu_notifier_invalidate_range_start(struct mm_struct *mm, id = srcu_read_lock(&srcu); hlist_for_each_entry_rcu(mn, &mm->mmu_notifier_mm->list, hlist) { if (mn->ops->invalidate_range_start) { - int _ret = mn->ops->invalidate_range_start(mn, mm, start, end, blockable); + int _ret; + + if (!blockable) + non_block_start(); + _ret = mn->ops->invalidate_range_start(mn, mm, start, end, blockable); + if (!blockable) + non_block_end(); if (_ret) { pr_info("%pS callback failed with %d in %sblockable context.\n", mn->ops->invalidate_range_start, _ret,