| Message ID | 20181212163057.22183-2-tudor.ambarus@microchip.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | c2dfab7e40095b29668a4022a5558549e544e3cd |
| Headers | show |
| Series | [1/2] ARM: dts: at91: at91-sama5d27_som1: add QSPI1 + SPI NOR memory nodes | expand |
On 12/12/2018 16:31:11+0000, Tudor.Ambarus@microchip.com wrote: > From: Claudiu Beznea <claudiu.beznea@microchip.com> > > Enable qspi1. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> > --- > arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++++ > 1 file changed, 4 insertions(+) > Applied, thanks.
On 12/12/2018 16:31:11+0000, Tudor.Ambarus@microchip.com wrote: > From: Claudiu Beznea <claudiu.beznea@microchip.com> > > Enable qspi1. > > Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Note that this should have your SoB too as you are sending a patch that is not from you. > --- > arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts > index 363a43d77424..73d16d98bf9c 100644 > --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts > +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts > @@ -109,6 +109,10 @@ > status = "okay"; > }; > > + qspi1: spi@f0024000 { > + status = "okay"; > + }; > + > spi0: spi@f8000000 { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_spi0_default>; > -- > 2.9.4 >
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts index 363a43d77424..73d16d98bf9c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts @@ -109,6 +109,10 @@ status = "okay"; }; + qspi1: spi@f0024000 { + status = "okay"; + }; + spi0: spi@f8000000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi0_default>;