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Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by merlin.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gXUKu-0005jN-St for linux-arm-kernel@lists.infradead.org; Thu, 13 Dec 2018 16:59:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B76BAEBD; Thu, 13 Dec 2018 08:59:44 -0800 (PST) Received: from e119884-lin.cambridge.arm.com (e119884-lin.cambridge.arm.com [10.1.196.72]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A47473F614; Thu, 13 Dec 2018 08:59:42 -0800 (PST) From: Vincenzo Frascino To: linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 22/24] clock: csrc-4k: Add support for vdso_direct Date: Thu, 13 Dec 2018 16:57:44 +0000 Message-Id: <20181213165746.56930-23-vincenzo.frascino@arm.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181213165746.56930-1-vincenzo.frascino@arm.com> References: <20181213165746.56930-1-vincenzo.frascino@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181213_115945_080568_C628EA87 X-CRM114-Status: GOOD ( 16.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , Catalin Marinas , Daniel Lezcano , Will Deacon , Russell King , Ralf Baechle , Mark Salyzyn , Paul Burton , Thomas Gleixner , Peter Collingbourne Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is a consequence of the introduction of vdso_direct on mips architectures. If the clock source is selected, vdso_direct is set to true. Cc: Ralf Baechle Cc: Paul Burton Signed-off-by: Vincenzo Frascino --- arch/mips/kernel/csrc-r4k.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/csrc-r4k.c b/arch/mips/kernel/csrc-r4k.c index eed099f35bf1..97e2a8aafdd6 100644 --- a/arch/mips/kernel/csrc-r4k.c +++ b/arch/mips/kernel/csrc-r4k.c @@ -77,8 +77,10 @@ int __init init_r4k_clocksource(void) * R2 onwards makes the count accessible to user mode so it can be used * by the VDSO (HWREna is configured by configure_hwrena()). */ - if (cpu_has_mips_r2_r6 && rdhwr_count_usable()) + if (cpu_has_mips_r2_r6 && rdhwr_count_usable()) { + clocksource_mips.archdata.vdso_direct = true; clocksource_mips.archdata.vdso_clock_mode = VDSO_CLOCK_R4K; + } clocksource_register_hz(&clocksource_mips, mips_hpt_frequency);